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L3 updates -- p9_sbe_mcs_setup, p9_revert_sbe_mcs_setup
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p9_revert_sbe_mcs_setup
  query ATTR_CHIP_UNIT_POS to eliminate dependence on platform
  getChildren() call returning targets in chip unit position order

p9_sbe_mcs_setup
  merge specialization definitions for set_hb_dcbz_config
  add FFDC collection

p9_sbe_mcs_setup_errors
  add FFDC, callout actions

Change-Id: I26bae24d7686bbba78c5844197a17295ce0de167
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41108
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41113
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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@jjmcgill @dcrowell77
jjmcgill authored and dcrowell77 committed Jun 19, 2017
1 parent 9971669 commit 14b4ca3
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176 changes: 102 additions & 74 deletions src/import/chips/p9/procedures/hwp/nest/p9_revert_sbe_mcs_setup.C
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Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,6 @@
///
/// @file p9_revert_sbe_mcs_setup.C
/// @brief Revert MC configuration applied by SBE (FAPI2)

///
/// @author Joe McGill <jmcgill@us.ibm.com>
///
Expand All @@ -34,7 +33,7 @@
// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
// *HWP Team: Nest
// *HWP Level: 2
// *HWP Level: 3
// *HWP Consumed by: HB
//

Expand Down Expand Up @@ -98,115 +97,144 @@ const uint64_t MCS_MCFIRMASK_OR_ARR[NUM_MCS_MI_TARGETS] =
MCS_3_MCFIRMASK_OR
};


//------------------------------------------------------------------------------
// Function definitions
//------------------------------------------------------------------------------


///
/// @brief helper function revert the dcbz configuration
/// @brief helper function to revert HB dcbz configuration
///
/// @param[in] i_target Reference to an MC target (MCS/MI)
/// @param[in] i_mc the unit number.
////// @return FAPI2_RC_SUCCESS if success, else error code.
/// @tparam T template parameter, passed in target.
/// @param[in] i_target Reference to a chip target
/// @param[in] i_mc_targets Vector of present MCS/MI unit targets
/// @return FAPI2_RC_SUCCESS if success, else error code.
///
template<fapi2::TargetType T>
fapi2::ReturnCode
revert_mc_hb_dcbz_config(const fapi2::Target<T>& i_target,
const uint8_t i_mc)
revert_mc_hb_dcbz_config(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
const std::vector<fapi2::Target<T>>& i_mc_targets)
{
FAPI_DBG("Start revert_mc_hb_dcbz_config");
fapi2::buffer<uint64_t> l_cplt_ctrl1;
fapi2::buffer<uint64_t> l_mcfgp;
fapi2::buffer<uint64_t> l_mcmode1;
fapi2::buffer<uint64_t> l_mcperf1;
fapi2::buffer<uint64_t> l_mcfirmask;

FAPI_TRY(fapi2::getScom(i_target, MCS_CPLT_CTRL1_ARR[i_mc], l_cplt_ctrl1),
"Error from getscom (CPLT_CTRL1)");
FAPI_DBG("Start");

if (!l_cplt_ctrl1.getBit(MCS_CPLT_CTRL1_BIT_ARR[i_mc]))
for (auto l_mc_target : i_mc_targets)
{
// MCFGP -- mark BAR invalid & reset grouping configuration fields
FAPI_TRY(fapi2::getScom(i_target, MCS_MCFGP_ARR[i_mc], l_mcfgp),
"Error from getScom (MCS%d_MCFGP)", i_mc);
l_mcfgp.clearBit<MCS_MCFGP_VALID>();
l_mcfgp.clearBit<MCS_MCFGP_MC_CHANNELS_PER_GROUP,
MCS_MCFGP_MC_CHANNELS_PER_GROUP_LEN>();
l_mcfgp.clearBit<MCS_MCFGP_CHANNEL_0_GROUP_MEMBER_IDENTIFICATION,
MCS_MCFGP_CHANNEL_0_GROUP_MEMBER_IDENTIFICATION_LEN>();
l_mcfgp.clearBit<MCS_MCFGP_GROUP_SIZE, MCS_MCFGP_GROUP_SIZE_LEN>();
FAPI_TRY(fapi2::putScom(i_target, MCS_MCFGP_ARR[i_mc], l_mcfgp),
"Error from putScom (MCS%d_MCFGP)", i_mc);

// MCMODE1 -- enable speculation, cmd bypass, fp command bypass
FAPI_TRY(fapi2::getScom(i_target, MCS_MCMODE1_ARR[i_mc], l_mcmode1),
"Error from getScom (MCS%d_MCMODE1)", i_mc);
l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_ALL_SPEC_OPS>();
l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_SPEC_OP,
MCS_MCMODE1_DISABLE_SPEC_OP_LEN>();
l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_COMMAND_BYPASS,
MCS_MCMODE1_DISABLE_COMMAND_BYPASS_LEN>();
l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_FP_COMMAND_BYPASS>();
FAPI_TRY(fapi2::putScom(i_target, MCS_MCMODE1_ARR[i_mc], l_mcmode1),
"Error from putScom (MCS%d_MCMODE1)", i_mc);

// MCS_MCPERF1 -- enable fast path
FAPI_TRY(fapi2::getScom(i_target, MCS_MCPERF1_ARR[i_mc], l_mcperf1),
"Error from getScom (MCS%d_MCPERF1)", i_mc);
l_mcperf1.clearBit<MCS_MCPERF1_DISABLE_FASTPATH>();
FAPI_TRY(fapi2::putScom(i_target, MCS_MCPERF1_ARR[i_mc], l_mcperf1),
"Error from putScom (MCS%d_MCPERF1)", i_mc);

// Re-mask MCFIR. We want to ensure all MCSs are masked
// until the BARs are opened later during IPL.
l_mcfirmask.flush<1>();
FAPI_TRY(fapi2::putScom(i_target, MCS_MCFIRMASK_OR_ARR[i_mc], l_mcfirmask),
"Error from putScom (MCS % d_MCFIRMASK_OR)", i_mc);
fapi2::buffer<uint64_t> l_cplt_ctrl1;
fapi2::buffer<uint64_t> l_mcfgp;
fapi2::buffer<uint64_t> l_mcmode1;
fapi2::buffer<uint64_t> l_mcperf1;
fapi2::buffer<uint64_t> l_mcfirmask;
uint8_t l_mc_pos = 0;

FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS,
l_mc_target,
l_mc_pos),
"Error from FAPI_ATTR_GET (ATTR_CHIP_UNIT_POS)");

FAPI_TRY(fapi2::getScom(i_target,
MCS_CPLT_CTRL1_ARR[l_mc_pos],
l_cplt_ctrl1),
"Error from getscom (CPLT_CTRL1)");

if (!l_cplt_ctrl1.getBit(MCS_CPLT_CTRL1_BIT_ARR[l_mc_pos]))
{
// MCFGP -- mark BAR invalid & reset grouping configuration fields
FAPI_TRY(fapi2::getScom(i_target,
MCS_MCFGP_ARR[l_mc_pos],
l_mcfgp),
"Error from getScom (MCS%d_MCFGP)", l_mc_pos);
l_mcfgp.clearBit<MCS_MCFGP_VALID>();
l_mcfgp.clearBit<MCS_MCFGP_MC_CHANNELS_PER_GROUP,
MCS_MCFGP_MC_CHANNELS_PER_GROUP_LEN>();
l_mcfgp.clearBit<MCS_MCFGP_CHANNEL_0_GROUP_MEMBER_IDENTIFICATION,
MCS_MCFGP_CHANNEL_0_GROUP_MEMBER_IDENTIFICATION_LEN>();
l_mcfgp.clearBit<MCS_MCFGP_GROUP_SIZE, MCS_MCFGP_GROUP_SIZE_LEN>();
FAPI_TRY(fapi2::putScom(i_target,
MCS_MCFGP_ARR[l_mc_pos],
l_mcfgp),
"Error from putScom (MCS%d_MCFGP)", l_mc_pos);

// MCMODE1 -- enable speculation, cmd bypass, fp command bypass
FAPI_TRY(fapi2::getScom(i_target,
MCS_MCMODE1_ARR[l_mc_pos],
l_mcmode1),
"Error from getScom (MCS%d_MCMODE1)", l_mc_pos);
l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_ALL_SPEC_OPS>();
l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_SPEC_OP,
MCS_MCMODE1_DISABLE_SPEC_OP_LEN>();
l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_COMMAND_BYPASS,
MCS_MCMODE1_DISABLE_COMMAND_BYPASS_LEN>();
l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_FP_COMMAND_BYPASS>();
FAPI_TRY(fapi2::putScom(i_target,
MCS_MCMODE1_ARR[l_mc_pos],
l_mcmode1),
"Error from putScom (MCS%d_MCMODE1)", l_mc_pos);

// MCS_MCPERF1 -- enable fast path
FAPI_TRY(fapi2::getScom(i_target,
MCS_MCPERF1_ARR[l_mc_pos],
l_mcperf1),
"Error from getScom (MCS%d_MCPERF1)", l_mc_pos);
l_mcperf1.clearBit<MCS_MCPERF1_DISABLE_FASTPATH>();
FAPI_TRY(fapi2::putScom(i_target,
MCS_MCPERF1_ARR[l_mc_pos],
l_mcperf1),
"Error from putScom (MCS%d_MCPERF1)", l_mc_pos);

// Re-mask MCFIR. We want to ensure all MCSs are masked
// until the BARs are opened later during IPL.
l_mcfirmask.flush<1>();
FAPI_TRY(fapi2::putScom(i_target,
MCS_MCFIRMASK_OR_ARR[l_mc_pos],
l_mcfirmask),
"Error from putScom (MCS % d_MCFIRMASK_OR)", l_mc_pos);
}
}

fapi_try_exit:
FAPI_DBG("End revert_mc_hb_dcbz_config");
FAPI_DBG("End");
return fapi2::current_err;
}


// HWP entry point
fapi2::ReturnCode
p9_revert_sbe_mcs_setup(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
p9_revert_sbe_mcs_setup(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
{
FAPI_INF("Start");

fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
fapi2::ATTR_SYSTEM_IPL_PHASE_Type l_ipl_phase;
auto l_mcs_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_MCS>(fapi2::TARGET_STATE_PRESENT);
auto l_mi_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_MI>(fapi2::TARGET_STATE_PRESENT);

FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IPL_PHASE, FAPI_SYSTEM, l_ipl_phase),
auto l_mcs_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_MCS>(
fapi2::TARGET_STATE_PRESENT);
auto l_mi_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_MI>(
fapi2::TARGET_STATE_PRESENT);

FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IPL_PHASE,
fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(),
l_ipl_phase),
"Error from FAPI_ATTR_GET (ATTR_SYSTEM_IPL_PHASE)");

if (l_ipl_phase == fapi2::ENUM_ATTR_SYSTEM_IPL_PHASE_CHIP_CONTAINED)
{

FAPI_INF("Leaving MC BAR configured for chip contained execution");
goto fapi_try_exit;
}

if (l_mcs_chiplets.size())
{
for (uint8_t l_mcs = 0; l_mcs < NUM_MCS_MI_TARGETS; l_mcs++)
{
FAPI_TRY(revert_mc_hb_dcbz_config(i_target, l_mcs),
"Error from revert_mcs_hb_dcbz_config");
}
FAPI_TRY(revert_mc_hb_dcbz_config<fapi2::TARGET_TYPE_MCS>(
i_target,
l_mcs_chiplets),
"Error from revert_mcs_hb_dcbz_config (MCS)");

}
else if (l_mi_chiplets.size())
{
for (uint8_t l_mi = 0; l_mi < NUM_MCS_MI_TARGETS; l_mi++)
{
FAPI_TRY(revert_mc_hb_dcbz_config(i_target, l_mi),
"Error from revert_mi_hb_dcbz_config");
}
FAPI_TRY(revert_mc_hb_dcbz_config<fapi2::TARGET_TYPE_MI>(
i_target,
l_mi_chiplets),
"Error from revert_mi_hb_dcbz_config (MI)");
}
else
{
Expand Down
10 changes: 6 additions & 4 deletions src/import/chips/p9/procedures/hwp/nest/p9_revert_sbe_mcs_setup.H
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2016 */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -38,7 +38,7 @@
// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
// *HWP Team: Nest
// *HWP Level: 2
// *HWP Level: 3
// *HWP Consumed by: HB
//

Expand All @@ -56,7 +56,8 @@
//------------------------------------------------------------------------------

/// function pointer typedef definition for HWP call support
typedef fapi2::ReturnCode (*p9_revert_sbe_mcs_setup_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
typedef fapi2::ReturnCode (*p9_revert_sbe_mcs_setup_FP_t) (
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);


//------------------------------------------------------------------------------
Expand All @@ -73,7 +74,8 @@ extern "C"
/// @param[in] i_target Reference to processor chip target
/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
///
fapi2::ReturnCode p9_revert_sbe_mcs_setup(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
fapi2::ReturnCode p9_revert_sbe_mcs_setup(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);

} // extern "C"

Expand Down

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