Update TRFC_DLR to uint16 for 16Gb support

git-coreq:hostboot:I9ea8719d4d1145fe753e391fbe097439feeec8df
Change-Id: I9ea8719d4d1145fe753e391fbe097439feeec8df
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/90943
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Devon A Baughen <devon.baughen1@ibm.com>
Dev-Ready: Devon A Baughen <devon.baughen1@ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/90956
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>

src/import/generic/memory/lib/data_engine/attr_engine_traits.H

@@ -3338,7 +3338,7 @@ struct attrEngineTraits<P, attr_eff_engine_fields, attr_eff_engine_fields::DRAM_
         uint8_t l_refresh_mode = 0;
         uint8_t l_dram_density = 0;
         uint64_t l_trfc_dlr_in_ps = 0;
-        uint8_t l_trfc_dlr_in_nck = 0;
+        attr_integral_type l_trfc_dlr_in_nck = 0;
 
         FAPI_TRY( attr::get_freq(mss::find_target<fapi2::TARGET_TYPE_MEM_PORT>(l_dimm), l_freq) );
         FAPI_TRY( freq_to_ps(l_freq, l_tck_in_ps),

src/import/generic/memory/lib/mss_generic_attribute_getters.H

@@ -2767,15 +2767,16 @@ fapi_try_exit:
 ///
 /// @brief ATTR_MEM_EFF_DRAM_TRFC_DLR getter
 /// @param[in] const ref to the TARGET_TYPE_MEM_PORT
-/// @param[out] uint8_t& reference to store the value
+/// @param[out] uint16_t& reference to store the value
 /// @note Generated by gen_accessors.pl generate_mc_port_params
 /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
 /// @note  Minimum Refresh Recovery Delay Time (different logical ranks) in nck (number of
 /// clock cyles). Selected tRFC value (tRFC_dlr1, tRFC_dlr2, or tRFC_dlr4) depends on
 /// MRW attribute that selects fine refresh mode (x1, x2, x4). For 3DS, The tRFC time
 /// to different logical ranks are defined as tRFC_dlr
 ///
-inline fapi2::ReturnCode get_dram_trfc_dlr(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target, uint8_t& o_value)
+inline fapi2::ReturnCode get_dram_trfc_dlr(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
+        uint16_t& o_value)
 {
 
     FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MEM_EFF_DRAM_TRFC_DLR, i_target, o_value) );

src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml

@@ -859,7 +859,7 @@
       For 3DS, The tRFC time to different logical ranks are defined as tRFC_dlr
     </description>
     <initToZero></initToZero>
-    <valueType>uint8</valueType>
+    <valueType>uint16</valueType>
     <writeable/>
     <mssUnits> nck </mssUnits>
     <mssAccessorName>dram_trfc_dlr</mssAccessorName>