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Remove IOMCFIR and SCOM_MODE_PB checks
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Two checks not needed since any IOMCFIR bit configured for
channel fail will turn on CHIFIR[4] which is already being checked.

Change-Id: Ifd09a919f016d0506bc02a233c7e8ae699fb5d77
CQ:SW435612
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61488
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Marc Gollub <gollub@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61507
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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mderkse1 authored and crgeddes committed Jun 29, 2018
1 parent 1edd371 commit 1a90c43
Showing 1 changed file with 4 additions and 56 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@
/* IBM_PROLOG_END_TAG */
///
/// @file p9c_query_channel_failure.C
/// @brief Query IOMCFIRS and CHIFIRS for an active attention that is
/// @brief Query CHIFIRS for an active attention that is
/// configured to channel failure
///

Expand All @@ -42,14 +42,7 @@
#include <p9c_query_channel_failure.H>
#include <generic/memory/lib/utils/c_str.H>

// How many DMIs are allowed on MC
constexpr uint32_t DMI_TARGETS_PER_MC = 4;

// SCOM registers needed for channel failure checking
// MC target register addresses
constexpr uint64_t SCOM_IOMCFIR_ADDR = 0x07011000ull;
constexpr uint64_t SCOM_MODE_PB_ADDR = 0x07011020ull;

// DMI target register addresses
constexpr uint64_t SCOM_CHIFIR_ADDR = 0x07010900ull;
constexpr uint64_t SCOM_MCICFG0_ADDR = 0x0701090Aull;
Expand Down Expand Up @@ -141,60 +134,15 @@ fapi2::ReturnCode p9c_query_channel_failure(
o_failed = false;

// storage for register data
fapi2::buffer<uint64_t> l_iomcfir_data;
fapi2::buffer<uint64_t> l_scom_mode_pb_data;
fapi2::buffer<uint64_t> l_chifir_data;
fapi2::buffer<uint64_t> l_mcicfg1_data;
fapi2::buffer<uint64_t> l_mcicfg0_data;

do
{
// IOMCFIR
// - These FIRs exist on the MC targets.
// Each FIR characterizes the four DMI targets attached to the MC
// (DMI 0: bits 8-15, DMI 1: bits 16-23,
// DMI 2: bits 24-31, DMI 3: bits 32-39).
// - Each logical byte within that FIR is configured with
// SCOM_MODE_PB[15:22].
// - So all that we need to do is AND the eight bits for the target DMI
// in the IOMCFIR with the eight bits from SCOM_MODE_PB. If the value
// is non-zero, there was a channel failure.

// get the MC target from the child DMI
const auto& l_mc_tgt = i_tgt.getParent<fapi2::TARGET_TYPE_MC>();

FAPI_TRY(fapi2::getScom(l_mc_tgt, SCOM_IOMCFIR_ADDR, l_iomcfir_data),
"Error from getScom (IOMCFIR Register)");

FAPI_TRY(fapi2::getScom(l_mc_tgt, SCOM_MODE_PB_ADDR, l_scom_mode_pb_data),
"Error from getScom (SCOM_MODE_PB Register)");


// Calculate the starting index based on relative DMI target position
// DMI 0: 8, DMI 1: 16, DMI 2: 24, DMI 3: 32
uint32_t l_pos = 0;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FAPI_POS, i_tgt, l_pos));
uint32_t l_iomcfir_idx = ((l_pos % DMI_TARGETS_PER_MC) + 1) * 8;

uint8_t l_firData_byte = 0x00;
uint8_t l_modePB_byte = 0x00;

// extract logical byte within the FIR based on DMI relative position
FAPI_TRY( l_iomcfir_data.extract(l_firData_byte, l_iomcfir_idx, 8),
" Error grabbing IOMCFIR buffer" );

// extract configuration byte at SCOM_MOD_PB[15:22]
l_scom_mode_pb_data.extract<15, 8>(l_modePB_byte);

// check for channel failure(s) in configured byte
if ((l_firData_byte & l_modePB_byte) != 0)
{
FAPI_INF("Found channel failure in IOMCFIR (0x%02X & 0x%02X) "
"of %s target", l_firData_byte, l_modePB_byte,
mss::c_str(l_mc_tgt));
o_failed = true;
break; // Found a channel failure, no need to keep looking for one
}
// No longer need to check IOMCFIR and SCOM_MODE_PB since
// any IOMCFIR bit configured for channel fail will turn on CHIFIR[4]
// which is checked below (FIR_DMI_CHANNEL_FAIL_BIT)

////////////////////////////////////////////////////////////////
// Check for channel failures using CHIFIR of the DMI target
Expand Down

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