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PRD: PLL analysis support for Axone
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Change-Id: Icbfc1e29e9e1503a9874f278517f415eff4f2c3d
RTC: 202545
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69635
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69700
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
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@zane131
zane131 committed Dec 13, 2018
1 parent 96251f9 commit 229ade5
Showing 1 changed file with 13 additions and 1 deletion.
14 changes: 13 additions & 1 deletion src/usr/diag/prdf/common/plat/p9/prdfP9Pll.C
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Original file line number Diff line number Diff line change
Expand Up @@ -86,6 +86,7 @@ void getChpltList ( ExtensibleChip * i_chip,
o_cfgRegStr = "PCI_CONFIG_REG";
break;
case TYPE_MCBIST:
case TYPE_MC:
o_errRegStr = "MC_ERROR_REG";
o_cfgRegStr = "MC_CONFIG_REG";
break;
Expand Down Expand Up @@ -345,7 +346,8 @@ int32_t CheckErrorType( ExtensibleChip * i_chip, uint32_t & o_errType )
if (CheckChipletPll(i_chip, TYPE_PROC) ||
CheckChipletPll(i_chip, TYPE_XBUS) ||
CheckChipletPll(i_chip, TYPE_OBUS) ||
CheckChipletPll(i_chip, TYPE_MCBIST))
CheckChipletPll(i_chip, TYPE_MCBIST) ||
CheckChipletPll(i_chip, TYPE_MC))
{
o_errType |= SYS_PLL_UNLOCK;
}
Expand All @@ -364,6 +366,7 @@ int32_t CheckErrorType( ExtensibleChip * i_chip, uint32_t & o_errType )
}
PRDF_PLUGIN_DEFINE_NS( nimbus_proc, Proc, CheckErrorType );
PRDF_PLUGIN_DEFINE_NS( cumulus_proc, Proc, CheckErrorType );
PRDF_PLUGIN_DEFINE_NS( axone_proc, Proc, CheckErrorType );

/**
* @brief Clear Chiplet PCB slave reg parity errors
Expand All @@ -382,6 +385,7 @@ int32_t clearParityError( ExtensibleChip * i_chip,
ClearChipletParityError(i_chip, TYPE_XBUS);
ClearChipletParityError(i_chip, TYPE_OBUS);
ClearChipletParityError(i_chip, TYPE_MCBIST);
ClearChipletParityError(i_chip, TYPE_MC);
ClearChipletParityError(i_chip, TYPE_PEC);
ClearChipletParityError(i_chip, TYPE_EQ);
ClearChipletParityError(i_chip, TYPE_CORE);
Expand All @@ -392,6 +396,7 @@ int32_t clearParityError( ExtensibleChip * i_chip,
}
PRDF_PLUGIN_DEFINE_NS( nimbus_proc, Proc, clearParityError );
PRDF_PLUGIN_DEFINE_NS( cumulus_proc, Proc, clearParityError );
PRDF_PLUGIN_DEFINE_NS( axone_proc, Proc, clearParityError );

/**
* @brief Query the PLL chip for a PLL error on P9
Expand Down Expand Up @@ -428,6 +433,7 @@ int32_t QueryPll( ExtensibleChip * i_chip,
}
PRDF_PLUGIN_DEFINE_NS( nimbus_proc, Proc, QueryPll );
PRDF_PLUGIN_DEFINE_NS( cumulus_proc, Proc, QueryPll );
PRDF_PLUGIN_DEFINE_NS( axone_proc, Proc, QueryPll );

/**
* @brief Clear the PLL error for P9 Plugin
Expand All @@ -449,6 +455,7 @@ int32_t ClearPll( ExtensibleChip * i_chip,
ClearChipletPll(i_chip, TYPE_XBUS);
ClearChipletPll(i_chip, TYPE_OBUS);
ClearChipletPll(i_chip, TYPE_MCBIST);
ClearChipletPll(i_chip, TYPE_MC);

// Clear TP_LFIR
SCAN_COMM_REGISTER_CLASS * TP_LFIRand =
Expand All @@ -471,6 +478,7 @@ int32_t ClearPll( ExtensibleChip * i_chip,
}
PRDF_PLUGIN_DEFINE_NS( nimbus_proc, Proc, ClearPll );
PRDF_PLUGIN_DEFINE_NS( cumulus_proc, Proc, ClearPll );
PRDF_PLUGIN_DEFINE_NS( axone_proc, Proc, ClearPll );

int32_t ClearMfPll( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & i_sc)
Expand Down Expand Up @@ -504,6 +512,7 @@ int32_t ClearMfPll( ExtensibleChip * i_chip,
}
PRDF_PLUGIN_DEFINE_NS( nimbus_proc, Proc, ClearMfPll );
PRDF_PLUGIN_DEFINE_NS( cumulus_proc, Proc, ClearMfPll );
PRDF_PLUGIN_DEFINE_NS( axone_proc, Proc, ClearMfPll );

/**
* @brief Mask the PLL error for P9 Plugin
Expand All @@ -524,6 +533,7 @@ int32_t MaskPll( ExtensibleChip * i_chip,
MaskChipletPll(i_chip, TYPE_XBUS);
MaskChipletPll(i_chip, TYPE_OBUS);
MaskChipletPll(i_chip, TYPE_MCBIST);
MaskChipletPll(i_chip, TYPE_MC);
}

if (PCI_PLL_UNLOCK & i_errType)
Expand Down Expand Up @@ -564,6 +574,7 @@ int32_t MaskPll( ExtensibleChip * i_chip,
}
PRDF_PLUGIN_DEFINE_NS( nimbus_proc, Proc, MaskPll );
PRDF_PLUGIN_DEFINE_NS( cumulus_proc, Proc, MaskPll );
PRDF_PLUGIN_DEFINE_NS( axone_proc, Proc, MaskPll );

/**
* @brief capture additional PLL FFDC
Expand Down Expand Up @@ -599,6 +610,7 @@ int32_t capturePllFfdc( ExtensibleChip * i_chip,
}
PRDF_PLUGIN_DEFINE_NS( nimbus_proc, Proc, capturePllFfdc );
PRDF_PLUGIN_DEFINE_NS( cumulus_proc, Proc, capturePllFfdc );
PRDF_PLUGIN_DEFINE_NS( axone_proc, Proc, capturePllFfdc );

} // end namespace Proc

Expand Down

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