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Enable regular wakeup after a quad is powered off
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We disabled regular wakeup on the way down but we need to turn it
back on. After discussion with power managment team we decided
this was a good place to re-enable regular wakeup

Change-Id: I2c70ac80f78a39542b7e154b92b5946d1dfef8b5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36838
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36841
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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crgeddes authored and dcrowell77 committed Mar 6, 2017
1 parent 9443077 commit 28770d1
Showing 1 changed file with 8 additions and 0 deletions.
8 changes: 8 additions & 0 deletions src/import/chips/p9/procedures/hwp/pm/p9_quad_power_off.C
Expand Up @@ -47,11 +47,13 @@
// Includes
// ----------------------------------------------------------------------
#include <p9_quad_power_off.H>
#include <p9_block_wakeup_intr.H>

// ----------------------------------------------------------------------
// Function definitions
// ----------------------------------------------------------------------


#ifdef __PPE__
uint64_t G_ring_save[8] = {0, 0, 0, 0, 0, 0, 0, 0};

Expand Down Expand Up @@ -197,6 +199,12 @@ fapi2::ReturnCode p9_quad_power_off(
PM_PFET_TYPE_C::BOTH, PM_PFET_TYPE_C::OFF);
FAPI_TRY(rc);

//Enable regular wakeup for each core after the quad has been powered off
for (const auto& l_core : i_target.getChildren<fapi2::TARGET_TYPE_CORE>())
{
FAPI_EXEC_HWP(rc, p9_block_wakeup_intr, l_core, p9pmblockwkup::CLEAR);
}

fapi_try_exit:
FAPI_INF("p9_quad_power_off: ...Exiting");
return fapi2::current_err;
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