extend bootconfig0 polling to account for longer sequence

CQ: SW491266
Change-Id: Iae2d757ef0141b1911de6877c25416c391e2abdd
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/96367
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Dev-Ready: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Thi N Tran <thi@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/96507
Reviewed-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Daniel M Crowell <dcrowell@us.ibm.com>

src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C

@@ -79,7 +79,9 @@ extern "C"
         FAPI_TRY(mss::exp::i2c::boot_config(i_target, l_boot_config_data));
 
         // Check FW status for success
-        l_rc = mss::exp::i2c::fw_status(i_target, mss::DELAY_1MS, 100);
+        // Note: Extended polling count from 100 to 1000 to account for longer Boot_config_0 sequence
+        // in Explorer FW CL-384401.
+        l_rc = mss::exp::i2c::fw_status(i_target, mss::DELAY_1MS, 1000);
 
         // Note: It's still under discussion whether FIRs will be lit if BOOT_CONFIG_0 fails, and if
         // the registers will be clocked so we can read them. Disabling FIR checking until this