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Updates exp access delay regs to set delays
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Change-Id: I2d78d348aa64f40410b697aae9bdd44ebc8faf1b
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82086
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82238
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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sglancy6 authored and dcrowell77 committed Aug 21, 2019
1 parent 12fdf64 commit 2a3012a
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Expand Up @@ -3148,5 +3148,6 @@ static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R7 = 0x04065dacull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R8 = 0x040661acull;
static const uint64_t EXPLR_RDF_MCBCM2 = 0x08011c35ull;
static const uint64_t EXPLR_TP_MB_UNIT_TOP_TR1_TRACE_TRCTRL_CONFIG = 0x08010442ull;
static const uint64_t EXP_APBONLY0_MICROCONTMUXSEL = 0x04340000ull;

#endif
Expand Up @@ -49,5 +49,6 @@ static const uint8_t EXPLR_MCBIST_MBSSYMEC9Q_MODAL_SYMBOL_COUNTER_79_LEN =
static const uint8_t EXPLR_RDF_MCBCM2_MCBIST_HALF_COMPARE_MASK = 0 ;
static const uint8_t EXPLR_RDF_MCBCM2_MCBIST_HALF_COMPARE_MASK_LEN = 40 ;
static const uint8_t EXPLR_TP_MB_UNIT_TOP_TR1_TRACE_TRCTRL_CONFIG_TRA_MASTER_CLOCK_ENABLE = 22;
static const uint8_t EXP_APBONLY0_MICROCONTMUXSEL_MICROCONTMUXSEL = 63 ;

#endif
Expand Up @@ -214,6 +214,7 @@ enum cmd_id : uint8_t
FW_PQM_HORIZONTAL_BATHTUB_GET = 0x18,
FW_PQM_VERTICAL_BATHTUB_GET = 0x19,
FW_PQM_2D_BATHTUB_GET = 0x1A,
EXP_FW_PQM_FORCE_DELAY_LINE_UPDATE = 0x1B,
};

///
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