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Axone only-IPL Procedures update to support SBE changes
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Using SBE_AXONE_CONFIG compile flag for Axone specific changes

Change-Id: I3d67c8f9ebba9fc18925ae02d1fff3cca8a9440b
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/53714
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/53736
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Abhishek Agarwal authored and crgeddes committed Sep 10, 2018
1 parent 9b9a992 commit 2c1001a
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Showing 3 changed files with 70 additions and 2 deletions.
65 changes: 65 additions & 0 deletions src/import/chips/p9/procedures/hwp/perv/p9_start_cbs.C
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Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,8 @@ fapi2::ReturnCode p9_start_cbs(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>
fapi2::buffer<uint8_t> l_read_attr;
fapi2::buffer<uint8_t> l_fifo_reset_skip;
const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
fapi2::buffer<uint8_t> l_is_axone;

FAPI_INF("p9_start_cbs: Entering ...");

FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW402019_PIBRESET_DELAY,
Expand All @@ -79,6 +81,8 @@ fapi2::ReturnCode p9_start_cbs(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_START_CBS_FIFO_RESET_SKIP,
FAPI_SYSTEM, l_fifo_reset_skip));

FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_P9A_SBE_REGION, i_target_chip, l_is_axone));

FAPI_DBG("Clearing Selfboot message register before every boot ");
// buffer is init value is 0
FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_SB_MSG_FSI, l_data32));
Expand Down Expand Up @@ -199,9 +203,70 @@ fapi2::ReturnCode p9_start_cbs(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>
.set_FSI2PIB_STATUS_READ(l_data32),
"ERROR:VDD OFF, FSI2PIB BIT 16 NOT SET");

if (l_is_axone)
{
FAPI_DBG("Switching to PIB2PCB mux sel to 1 [till pcbnet clocks are started]");
FAPI_TRY(p9_start_cbs_switch_to_pib2pcb_path_cfam(i_target_chip));
}

FAPI_INF("p9_start_cbs: Exiting ...");

fapi_try_exit:
return fapi2::current_err;

}

/// @brief Switching to PIB2PCB Path via cfam
///
/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP
/// @return FAPI2_RC_SUCCESS if success, else error code.
fapi2::ReturnCode p9_start_cbs_switch_to_pib2pcb_path_cfam(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
{
fapi2::buffer<uint32_t> l_read_reg;
FAPI_INF("p9_start_cbs_switch_to_pib2pcb_path_cfam: Entering ...");

FAPI_DBG("Reading ROOT_CTRL0_REG");
FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));

if (!l_read_reg.getBit<PERV_ROOT_CTRL0_SET_PCB_RESET_DC>())
{
FAPI_DBG("Setting PCB RESET bit in ROOT_CTRL0_REG");
l_read_reg.setBit<PERV_ROOT_CTRL0_SET_PCB_RESET_DC>();
FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));
}

if (!l_read_reg.getBit<PERV_ROOT_CTRL0_18_SPARE_MUX_CONTROL>())
{
FAPI_DBG("Setting PIB2PCB bit in ROOT_CTRL0_REG");
l_read_reg.setBit<PERV_ROOT_CTRL0_18_SPARE_MUX_CONTROL>();
FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));
}

if (l_read_reg.getBit<PERV_ROOT_CTRL0_PIB2PCB_DC>())
{
FAPI_DBG("Clearing FSI2PCB bit in ROOT_CTRL0_REG");
l_read_reg.clearBit<PERV_ROOT_CTRL0_PIB2PCB_DC>();
FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));
}

if (l_read_reg.getBit<PERV_ROOT_CTRL0_19_SPARE_MUX_CONTROL>())
{
FAPI_DBG("Clearing PCB2PCB bit in ROOT_CTRL0_REG");
l_read_reg.clearBit<PERV_ROOT_CTRL0_19_SPARE_MUX_CONTROL>();
FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));
}

if (l_read_reg.getBit<PERV_ROOT_CTRL0_SET_PCB_RESET_DC>())
{
FAPI_DBG("Clearing PCB RESET bit in ROOT_CTRL0_REG");
l_read_reg.clearBit<PERV_ROOT_CTRL0_SET_PCB_RESET_DC>();
FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_read_reg));
}

FAPI_INF("p9_start_cbs_switch_to_pib2pcb_path_cfam: Exiting ...");

fapi_try_exit:
return fapi2::current_err;

}
5 changes: 4 additions & 1 deletion src/import/chips/p9/procedures/hwp/perv/p9_start_cbs.H
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -62,4 +62,7 @@ extern "C"
const bool i_sbe_start = 0);
}

fapi2::ReturnCode p9_start_cbs_switch_to_pib2pcb_path_cfam(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip);

#endif
2 changes: 1 addition & 1 deletion src/import/chips/p9/procedures/hwp/perv/p9_start_cbs.mk
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
#
# OpenPOWER HostBoot Project
#
# Contributors Listed Below - COPYRIGHT 2015,2016
# Contributors Listed Below - COPYRIGHT 2015,2018
# [+] International Business Machines Corp.
#
#
Expand Down

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