Adds explorer 2666 CCS write workaround

Explorer has a bug where CCS will not send out proper data
for CCS writes (and PDA commands) at 2666 due to a 0 value
programmed into the WRDATA_DLY in the SRQ.

The workaround is in two parts:
1. override the CWL attribute to be 18 instead of 14
2. program in the proper MRS in draminit

Change-Id: I70f2cbcae0cc67cd0ae4859f8946a5f5a0c3c49c
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/94823
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: ANDRE A MARIN <aamarin@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/95079
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>

src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C

@@ -45,6 +45,7 @@
 #include <generic/memory/mss_git_data_helper.H>
 #include <generic/memory/lib/utils/fir/gen_mss_unmask.H>
 #include <generic/memory/lib/utils/mss_generic_check.H>
+#include <lib/workarounds/exp_ccs_2666_write_workarounds.H>
 
 extern "C"
 {
@@ -89,6 +90,12 @@ extern "C"
             FAPI_TRY(mss::exp::host_fw_phy_init_with_eye_capture(i_target, l_crc, l_phy_params));
         }
 
+        // Loops through the ports and issues the workaround for CCS writes at 2666
+        for(const auto& l_port : mss::find_targets<fapi2::TARGET_TYPE_MEM_PORT>(i_target))
+        {
+            FAPI_TRY(mss::exp::workarounds::updates_mode_registers(l_port));
+        }
+
         // Unmask registers after draminit training
         FAPI_TRY(mss::unmask::after_draminit_training(i_target), "%s Failed after_draminit_training", mss::c_str(i_target));
 

src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/ccs/ccs_traits_explorer.H

@@ -43,7 +43,7 @@
 #include <generic/memory/lib/utils/shared/mss_generic_consts.H>
 #include <generic/memory/lib/mss_generic_attribute_getters.H>
 #include <generic/memory/lib/ccs/ccs_traits.H>
-#include <exp_attribute_accessors_manual.H>
+#include <lib/exp_attribute_accessors_manual.H>
 
 ///
 /// @class ccsTraits

src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_ccs_2666_write_workarounds.C

@@ -22,3 +22,174 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file exp_ccs_2666_workarounds.H
+/// @brief Workarounds for explorer CCS write issue at 2666
+///
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP HWP Backup:  Mark Pizzutillo <Mark.Pizzutillo@ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: Memory
+
+#include <lib/shared/exp_defaults.H>
+#include <lib/ccs/ccs_traits_explorer.H>
+#include <lib/dimm/exp_mrs_traits.H>
+#include <fapi2.H>
+#include <lib/workarounds/exp_ccs_2666_write_workarounds.H>
+#include <mss_generic_attribute_getters.H>
+#include <generic/memory/lib/utils/fir/gen_mss_unmask.H>
+#include <generic/memory/lib/dimm/ddr4/mrs_load_ddr4.H>
+#include <lib/dimm/exp_rank.H>
+#include <lib/ccs/ccs_explorer.H>
+
+namespace mss
+{
+namespace exp
+{
+namespace workarounds
+{
+
+///
+/// @brief Determine if the CCS 2666 write workaround is needed
+/// @param[in] i_target port target on which to operate
+/// @param[out] o_is_needed true if the workaround needs to be run
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success
+///
+fapi2::ReturnCode is_ccs_2666_write_needed(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
+        bool& o_is_needed)
+{
+    constexpr uint64_t FREQ_NEEDS_WORKAROUND = 2666;
+    constexpr bool NO_RCD = false;
+
+    uint64_t l_freq = 0;
+    bool l_has_rcd = false;
+    o_is_needed = false;
+
+    FAPI_TRY(mss::attr::get_freq(i_target, l_freq));
+    FAPI_TRY(mss::unmask::has_rcd(i_target, l_has_rcd));
+
+    // The workaround is needed if we're at 2666 and do not have an RCD
+    o_is_needed = (l_freq == FREQ_NEEDS_WORKAROUND) &&
+                  (l_has_rcd == NO_RCD);
+    FAPI_DBG("%s freq:%lu, RCD:%s, workaround %s needed",
+             mss::c_str(i_target), l_freq, l_has_rcd ? "yes" : "no", o_is_needed ? "is" : "not");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Updates CAS write latency if the workaround is needed
+/// @param[in] i_target port target on which to operate
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success
+/// @note This is the first part of the CCS 2666 write workaround
+/// The CWL needs to be increased to 18 for 2666 (non RDIMM)
+/// This will put a non-zero value in the WRDATA_DLY, allowing for good CCS writes
+///
+fapi2::ReturnCode update_cwl(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target)
+{
+    constexpr uint64_t WORKAROUND_CWL = 18;
+    bool l_is_needed = false;
+
+    FAPI_TRY(is_ccs_2666_write_needed(i_target, l_is_needed));
+
+    // If the workaround is not needed, skip it
+    if(l_is_needed == false)
+    {
+        return fapi2::FAPI2_RC_SUCCESS;
+    }
+
+    // Update the CWL to the workaround value
+    FAPI_TRY(mss::attr::set_dram_cwl(i_target, WORKAROUND_CWL));
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Helper that adds the MR2 commands
+/// @param[in] i_target port target on which to operate
+/// @param[out] o_instructions CCS instructions
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success
+/// @note Unit test helper
+///
+fapi2::ReturnCode updates_mode_registers_helper(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
+        std::vector<ccs::instruction_t>& o_instructions)
+{
+    // The PHY puts us into self time refresh mode prior
+    // We need to exit self time refresh mode by holding the CKE high
+    // The time for this is tXPR = tRFC(min) + 10 ns
+    // This is 560ns -> 746 clocks. rounded up to 750 for saftey
+    constexpr uint16_t TXPR_SAFE_MARGIN = 750;
+
+    o_instructions.clear();
+
+    o_instructions.push_back(mss::ccs::des_command(TXPR_SAFE_MARGIN));
+
+    for(const auto& l_dimm : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target))
+    {
+        fapi2::ReturnCode l_mrs_rc = fapi2::FAPI2_RC_SUCCESS;
+        mss::ddr4::mrs02_data<mss::mc_type::EXPLORER> l_data(l_dimm, l_mrs_rc);
+
+        std::vector<mss::rank::info<>> l_ranks;
+        FAPI_TRY(mss::rank::ranks_on_dimm(l_dimm, l_ranks));
+        FAPI_TRY(l_mrs_rc);
+
+        // Loops through all ranks on this DIMM and adds them to the CCS instructions to execute
+        for(const auto& l_rank_info : l_ranks)
+        {
+            FAPI_TRY(mss::mrs_engine( l_dimm,
+                                      l_data,
+                                      l_rank_info.get_port_rank(),
+                                      mrsTraits<mss::mc_type::EXPLORER>::mrs_tmod(i_target),
+                                      o_instructions ));
+        }
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Updates MR2 to have the proper CWL value if the workaround is needed
+/// @param[in] i_target port target on which to operate
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success
+/// @note This is the second part of the CCS 2666 write workaround
+/// The CWL needs to be programmed into MR2
+/// This cannot be done with the Microchip FW as we do not have a parameter for CWL
+///
+fapi2::ReturnCode updates_mode_registers(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target)
+{
+    bool l_is_needed = false;
+
+    FAPI_TRY(is_ccs_2666_write_needed(i_target, l_is_needed));
+
+    // If the workaround is not needed, skip it
+    if(l_is_needed == false)
+    {
+        return fapi2::FAPI2_RC_SUCCESS;
+    }
+
+    // Update the CWL to the workaround value
+    {
+        mss::ccs::program l_program;
+
+        // Adds the instructions
+        FAPI_TRY(updates_mode_registers_helper(i_target, l_program.iv_instructions));
+
+        // Executes the CCS commands
+        FAPI_TRY(mss::ccs::execute(mss::find_target<fapi2::TARGET_TYPE_OCMB_CHIP>(i_target),
+                                   l_program,
+                                   i_target));
+    }
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+} // workarounds
+} // exp
+} // mss

src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/workarounds/exp_ccs_2666_write_workarounds.H

@@ -22,3 +22,72 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file exp_ccs_2666_workarounds.H
+/// @brief Workarounds for explorer CCS write issue at 2666
+///
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP HWP Backup:  Mark Pizzutillo <Mark.Pizzutillo@ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: Memory
+
+#ifndef _EXP_CCS_2666_WRITE_WORKAROUNDS_H_
+#define _EXP_CCS_2666_WRITE_WORKAROUNDS_H_
+
+#include <fapi2.H>
+#include <lib/ccs/ccs_explorer.H>
+
+namespace mss
+{
+namespace exp
+{
+namespace workarounds
+{
+
+///
+/// @brief Determine if the CCS 2666 write workaround is needed
+/// @param[in] i_target port target on which to operate
+/// @param[out] o_is_needed true if the workaround needs to be run
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success
+///
+fapi2::ReturnCode is_ccs_2666_write_needed(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
+        bool& o_is_needed);
+
+///
+/// @brief Updates CAS write latency if the workaround is needed
+/// @param[in] i_target port target on which to operate
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success
+/// @note This is the first part of the CCS 2666 write workaround
+/// The CWL needs to be increased to 18 for 2666 (non RDIMM)
+/// This will put a non-zero value in the WRDATA_DLY, allowing for good CCS writes
+///
+fapi2::ReturnCode update_cwl(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target);
+
+///
+/// @brief Helper that adds the MR2 commands
+/// @param[in] i_target port target on which to operate
+/// @param[out] o_instructions CCS instructions
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success
+/// @note Unit test helper
+///
+fapi2::ReturnCode updates_mode_registers_helper(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
+        std::vector<ccs::instruction_t>& o_instructions);
+
+///
+/// @brief Updates MR2 to have the proper CWL value if the workaround is needed
+/// @param[in] i_target port target on which to operate
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff success
+/// @note This is the second part of the CCS 2666 write workaround
+/// The CWL needs to be programmed into MR2
+/// This cannot be done with the Microchip FW as we do not have a parameter for CWL
+///
+fapi2::ReturnCode updates_mode_registers(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target);
+
+
+} // workarounds
+} // exp
+} // mss
+
+#endif

src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C

@@ -51,6 +51,7 @@
 #include <lib/freq/axone_freq_traits.H>
 #include <lib/freq/axone_sync.H>
 #include <generic/memory/mss_git_data_helper.H>
+#include <lib/workarounds/exp_ccs_2666_write_workarounds.H>
 
 ///
 /// @brief Configure the attributes for each controller
@@ -135,6 +136,9 @@ fapi2::ReturnCode p9a_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MEM
 
     }// dimm
 
+    // Conducts the workaround for CCS writes at 2666
+    FAPI_TRY(mss::exp::workarounds::update_cwl(i_target));
+
 fapi_try_exit:
     return fapi2::current_err;
 }

src/usr/isteps/istep07/makefile

@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2015,2019
+# Contributors Listed Below - COPYRIGHT 2015,2020
 # [+] International Business Machines Corp.
 #
 #
@@ -34,6 +34,7 @@ HWP_PATH_P9A += ${ROOTPATH}/src/import/chips/p9a/procedures/hwp/memory
 HWP_PATH_P9A += ${ROOTPATH}/src/import/chips/ocmb/common/procedures/hwp/pmic
 # Explorer
 HWP_PATH_EXP += ${ROOTPATH}/src/import/chips/ocmb/explorer/procedures/hwp/memory
+HWP_PATH_EXP += ${ROOTPATH}/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib
 
 HWP_PATH += ${HWP_PATH_P9}/ ${HWP_PATH_CEN}/ ${HWP_PATH_P9A}/ ${HWP_PATH_EXP}/
 

src/usr/isteps/istep13/makefile

@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2015,2019
+# Contributors Listed Below - COPYRIGHT 2015,2020
 # [+] International Business Machines Corp.
 #
 #