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Create and allow for PNOR SBE Partition to have DD1.0 and DD2.0 Images
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This commit will attempt to put the uncustomized DD1.0 and DD2.0
SBE images into a single PNOR SBE partition. To do so, the size of the
PNOR SBE partition was expanded.

Change-Id: I938a862bd974f5a2b4fa84fcf9a7e28268a1a5bc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41853
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: MURULIDHAR NATARAJU <murulidhar@in.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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@mabaiocchi @dcrowell77
mabaiocchi authored and dcrowell77 committed Jun 19, 2017
1 parent 274a64b commit 331c3aa
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Showing 3 changed files with 31 additions and 29 deletions.
28 changes: 14 additions & 14 deletions src/build/buildpnor/defaultPnorLayout.xml
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Original file line number Diff line number Diff line change
Expand Up @@ -160,10 +160,10 @@ Layout Description
</section>
-->
<section>
<description>SBE-IPL (Staging Area) (288K)</description>
<description>SBE-IPL (Staging Area) (520K)</description>
<eyeCatch>SBE</eyeCatch>
<physicalOffset>0xF61000</physicalOffset>
<physicalRegionSize>0x48000</physicalRegionSize>
<physicalRegionSize>0x82000</physicalRegionSize>
<sha512perEC/>
<sha512Version/>
<side>sideless</side>
Expand All @@ -172,7 +172,7 @@ Layout Description
<section>
<description>HCODE Ref Image (1.125MB)</description>
<eyeCatch>HCODE</eyeCatch>
<physicalOffset>0xFA9000</physicalOffset>
<physicalOffset>0xFE3000</physicalOffset>
<physicalRegionSize>0x120000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
Expand All @@ -181,7 +181,7 @@ Layout Description
<section>
<description>Hostboot Runtime Services for Sapphire (4.5MB)</description>
<eyeCatch>HBRT</eyeCatch>
<physicalOffset>0x10C9000</physicalOffset>
<physicalOffset>0x1103000</physicalOffset>
<physicalRegionSize>0x480000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
Expand All @@ -190,7 +190,7 @@ Layout Description
<section>
<description>Payload (21.375MB)</description>
<eyeCatch>PAYLOAD</eyeCatch>
<physicalOffset>0x1549000</physicalOffset>
<physicalOffset>0x1583000</physicalOffset>
<physicalRegionSize>0x1560000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
Expand All @@ -199,7 +199,7 @@ Layout Description
<section>
<description>Special PNOR Test Space (36K)</description>
<eyeCatch>TEST</eyeCatch>
<physicalOffset>0x2AA9000</physicalOffset>
<physicalOffset>0x2AE3000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<testonly/>
<side>sideless</side>
Expand All @@ -208,7 +208,7 @@ Layout Description
<section>
<description>Special PNOR Test Space (36K)</description>
<eyeCatch>TESTRO</eyeCatch>
<physicalOffset>0x2AB2000</physicalOffset>
<physicalOffset>0x2AEC000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<side>sideless</side>
<testonly/>
Expand All @@ -219,7 +219,7 @@ Layout Description
<section>
<description>Hostboot Bootloader (28K)</description>
<eyeCatch>HBBL</eyeCatch>
<physicalOffset>0x2ABB000</physicalOffset>
<physicalOffset>0x2AF5000</physicalOffset>
<!-- Physical Size includes Header rounded to ECC valid size -->
<!-- Max size of actual HBBL content is 20K and 22.5K with ECC -->
<physicalRegionSize>0x7000</physicalRegionSize>
Expand All @@ -230,31 +230,31 @@ Layout Description
<section>
<description>Global Data (36K)</description>
<eyeCatch>GLOBAL</eyeCatch>
<physicalOffset>0x2AC2000</physicalOffset>
<physicalOffset>0x2AFC000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>Ref Image Ring Overrides (20K)</description>
<eyeCatch>RINGOVD</eyeCatch>
<physicalOffset>0x2ACB000</physicalOffset>
<physicalOffset>0x2B05000</physicalOffset>
<physicalRegionSize>0x5000</physicalRegionSize>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>SecureBoot Key Transition Partition (16K)</description>
<eyeCatch>SBKT</eyeCatch>
<physicalOffset>0x2AD0000</physicalOffset>
<physicalOffset>0x2B0A000</physicalOffset>
<physicalRegionSize>0x4000</physicalRegionSize>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>OCC Lid (1.125M)</description>
<eyeCatch>OCC</eyeCatch>
<physicalOffset>0x2AD4000</physicalOffset>
<physicalOffset>0x2B0E000</physicalOffset>
<physicalRegionSize>0x120000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
Expand All @@ -265,7 +265,7 @@ Layout Description
<!-- We need 266KB per module sort, going to support
10 sorts by default, plus ECC -->
<eyeCatch>WOFDATA</eyeCatch>
<physicalOffset>0x2BF4000</physicalOffset>
<physicalOffset>0x2C2E000</physicalOffset>
<physicalRegionSize>0x300000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
Expand All @@ -274,7 +274,7 @@ Layout Description
<section>
<description>FIRDATA (12K)</description>
<eyeCatch>FIRDATA</eyeCatch>
<physicalOffset>0x2EF4000</physicalOffset>
<physicalOffset>0x2F2E000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<side>sideless</side>
<ecc/>
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26 changes: 13 additions & 13 deletions src/build/buildpnor/pnorLayoutFSP.xml
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Original file line number Diff line number Diff line change
Expand Up @@ -160,10 +160,10 @@ Layout Description - Used when building an FSP driver
</section>
-->
<section>
<description>SBE-IPL (Staging Area) (288K)</description>
<description>SBE-IPL (Staging Area) (520K)</description>
<eyeCatch>SBE</eyeCatch>
<physicalOffset>0xF61000</physicalOffset>
<physicalRegionSize>0x48000</physicalRegionSize>
<physicalRegionSize>0x82000</physicalRegionSize>
<sha512perEC/>
<sha512Version/>
<side>sideless</side>
Expand All @@ -172,7 +172,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>HCODE Ref Image (1.125MB)</description>
<eyeCatch>HCODE</eyeCatch>
<physicalOffset>0xFA9000</physicalOffset>
<physicalOffset>0xFE3000</physicalOffset>
<physicalRegionSize>0x120000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
Expand All @@ -181,7 +181,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>Hostboot Runtime Services for Sapphire (4.5MB)</description>
<eyeCatch>HBRT</eyeCatch>
<physicalOffset>0x10C9000</physicalOffset>
<physicalOffset>0x1103000</physicalOffset>
<physicalRegionSize>0x480000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
Expand All @@ -190,15 +190,15 @@ Layout Description - Used when building an FSP driver
<section>
<description>Payload (21.375MB)</description>
<eyeCatch>PAYLOAD</eyeCatch>
<physicalOffset>0x1549000</physicalOffset>
<physicalOffset>0x1583000</physicalOffset>
<physicalRegionSize>0x1560000</physicalRegionSize>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>Special PNOR Test Space (36K)</description>
<eyeCatch>TEST</eyeCatch>
<physicalOffset>0x2AA9000</physicalOffset>
<physicalOffset>0x2AE3000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<testonly/>
<side>sideless</side>
Expand All @@ -207,7 +207,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>Special PNOR Test Space (36K)</description>
<eyeCatch>TESTRO</eyeCatch>
<physicalOffset>0x2AB2000</physicalOffset>
<physicalOffset>0x2AEC000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<side>sideless</side>
<testonly/>
Expand All @@ -218,7 +218,7 @@ Layout Description - Used when building an FSP driver
<section>
<description>Hostboot Bootloader (28K)</description>
<eyeCatch>HBBL</eyeCatch>
<physicalOffset>0x2ABB000</physicalOffset>
<physicalOffset>0x2AF5000</physicalOffset>
<!-- Physical Size includes Header rounded to ECC valid size -->
<!-- Max size of actual HBBL content is 20K and 22.5K with ECC -->
<physicalRegionSize>0x7000</physicalRegionSize>
Expand All @@ -228,23 +228,23 @@ Layout Description - Used when building an FSP driver
<section>
<description>Global Data (36K)</description>
<eyeCatch>GLOBAL</eyeCatch>
<physicalOffset>0x2AC2000</physicalOffset>
<physicalOffset>0x2AFC000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>Ref Image Ring Overrides (20K)</description>
<eyeCatch>RINGOVD</eyeCatch>
<physicalOffset>0x2ACB000</physicalOffset>
<physicalOffset>0x2B05000</physicalOffset>
<physicalRegionSize>0x5000</physicalRegionSize>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>SecureBoot Key Transition Partition (16K)</description>
<eyeCatch>SBKT</eyeCatch>
<physicalOffset>0x2AD0000</physicalOffset>
<physicalOffset>0x2B0A000</physicalOffset>
<physicalRegionSize>0x4000</physicalRegionSize>
<side>sideless</side>
<ecc/>
Expand All @@ -254,15 +254,15 @@ Layout Description - Used when building an FSP driver
<!-- We need 266KB per module sort, going to support
10 sorts by default, plus ECC -->
<eyeCatch>WOFDATA</eyeCatch>
<physicalOffset>0x2BF4000</physicalOffset>
<physicalOffset>0x2B0E000</physicalOffset>
<physicalRegionSize>0x300000</physicalRegionSize>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>FIRDATA (12K)</description>
<eyeCatch>FIRDATA</eyeCatch>
<physicalOffset>0x2EF4000</physicalOffset>
<physicalOffset>0x2E0E000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<side>sideless</side>
<ecc/>
Expand Down
6 changes: 4 additions & 2 deletions src/build/mkrules/hbfw/img/makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,7 @@ install_all: gen_system_specific_images build_sbe_partitions build_pnor_images
HBFW_OBJPATH = ${.PATH:M*obj*}
ENGD_OBJPATH = ${HBFW_OBJPATH:S/hbfw\/img/engd\/href/g}
ENGD_SRCPATH = ${SRCPATH:S/hbfw\/img/engd\/href/g}
SBEI_OBJPATH = ${HBFW_OBJPATH:S/hbfw\/img/sbei\/sbfw\/img/g}

#################################################
# Copy Hostboot binary images to obj dir to be grabbed
Expand Down Expand Up @@ -168,10 +169,11 @@ clobber_cp_hbfiles:
#################################################
SBE_BUILD_SCRIPT = ${buildSbePart.pl:P}

P9N_EC10_BIN = ${ENGD_OBJPATH:Fp9n_10.sbe_seeprom.hdr.bin}
P9N_EC10_BIN = ${SBEI_OBJPATH:Fp9n_10.sbe_seeprom.hdr.bin}
P9N_EC20_BIN = ${SBEI_OBJPATH:Fp9n_20.sbe_seeprom.hdr.bin}

SBE_PART_INFO = \
p9nSbePartition.bin:10=${P9N_EC10_BIN}
p9nSbePartition.bin:10=${P9N_EC10_BIN},20=${P9N_EC20_BIN}


__SBE_PART_BUILD/% : .SPECTARG .PMAKE
Expand Down

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