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Adjust idec algorithm for Explorer B.0 format
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The update to B.0 doesn't allow for a change to the register that
previously contained the MAJOR_REVISION value.  Because of that
we are revising the logic that determines the EC level to be a
lookup based on a single number instead.

Ignore the MAJOR_RELEASE field from CHIP_INFO entirely, it will
always =1. Instead we will rely only on the EFUSE bits currently
designated for MINOR_RELEASE. Since we lost the ability to have
a common M.m we will just use a single incrementing value to
represent the ordinal revision number, regardless of major/minor,
i.e. the 1st revision is 0, the 2nd is 1, the 10th is 9, etc.
So that gives us these values for EFUSE_IMAGE_OUT_3[13:10]
  A.0 = 0 = 0x10 in Host Firmware
  A.1 = 1 = 0x11 in Host Firmware
  B.0 = 2 = 0x20 in Host Firmware
  B.1 = 3 = 0x21 in Host Firmware (if it were to happen)

Change-Id: I878491e8e004c231ce4dcd7abe887a947c7f3dc3
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89764
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89794
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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dcrowell77 committed Jan 29, 2020
1 parent a801fcf commit 3b5bb9f
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Showing 4 changed files with 106 additions and 28 deletions.
4 changes: 1 addition & 3 deletions src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* Contributors Listed Below - COPYRIGHT 2018,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand All @@ -27,8 +27,6 @@
#define __EXPLR_SCOM_ADDRESSES_FLD_FIXES_H

static const uint64_t EXPLR_MIPS_TO_OCMB_INTERRUPT_REGISTER1_DOORBELL = 63;
static const uint64_t EXPLR_EFUSE_IMAGE_OUT_3_ENTERPRISE_MODE_EC_MINOR = 50;
static const uint8_t EXPLR_EFUSE_IMAGE_OUT_3_ENTERPRISE_MODE_EC_MINOR_LEN = 4;
static const uint64_t EXPLR_EFUSE_IMAGE_OUT_0_ENTERPRISE_MODE_DIS = 53;
static const uint64_t EXPLR_SRQ_MBA_PMU8Q_CFG_INIT_COMPLETE = 63;

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73 changes: 51 additions & 22 deletions src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getidec.C
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2019 */
/* Contributors Listed Below - COPYRIGHT 2019,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -41,6 +41,7 @@
#include <chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H>
#include <chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H>
#include <generic/memory/mss_git_data_helper.H>
#include <generic/memory/lib/utils/c_str.H>

extern "C"
{
Expand All @@ -57,41 +58,69 @@ extern "C"
uint8_t& o_chipEc)
{
mss::display_git_commit_info("exp_getidec");
uint8_t l_majorEc = 0;
uint8_t l_minorEc = 0;
uint8_t l_revision = 0;
uint8_t l_location = 0;
uint8_t l_chipBaseId = 0;
fapi2::buffer<uint64_t> l_reg_buffer;
fapi2::buffer<uint64_t> l_chip_info_buffer;
fapi2::buffer<uint64_t> l_efuse3_buffer;

// The chipid and location come from the CHIP_INFO register
FAPI_TRY(fapi2::getScom( i_target,
static_cast<uint64_t>(mss::exp::idec_consts::EXPLR_CHIP_INFO_REG),
l_reg_buffer ),
l_chip_info_buffer ),
"exp_getidec: could not read explorer chip_info register register 0x%08x",
mss::exp::idec_consts::EXPLR_CHIP_INFO_REG);

l_reg_buffer.extractToRight<mss::exp::idec_consts::MAJOR_EC_BIT_START,
mss::exp::idec_consts::MAJOR_EC_BIT_LENGTH>(l_majorEc);
l_reg_buffer.extractToRight<mss::exp::idec_consts::LOCATION_BIT_START,
mss::exp::idec_consts::LOCATION_BIT_LENGTH>(l_location);
l_reg_buffer.extractToRight<mss::exp::idec_consts::CHIPID_BIT_START,
mss::exp::idec_consts::CHIPID_BIT_LENGTH>(l_chipBaseId);

// Due to design errors we must read the minor ec (2nd nibble) from a different register
FAPI_TRY(fapi2::getScom( i_target, static_cast<uint64_t>(EXPLR_EFUSE_IMAGE_OUT_3), l_reg_buffer ),
"exp_getidec: could not read explorer efuse_out3 register 0x%08x", EXPLR_EFUSE_IMAGE_OUT_3);

l_reg_buffer.extractToRight<EXPLR_EFUSE_IMAGE_OUT_3_ENTERPRISE_MODE_EC_MINOR,
EXPLR_EFUSE_IMAGE_OUT_3_ENTERPRISE_MODE_EC_MINOR_LEN>(l_minorEc);

// Major EC 0:3
// Minor EC 4:7
o_chipEc = (l_majorEc << 4) | l_minorEc;
l_chip_info_buffer.extractToRight<mss::exp::idec_consts::LOCATION_BIT_START,
mss::exp::idec_consts::LOCATION_BIT_LENGTH>(l_location);
l_chip_info_buffer.extractToRight<mss::exp::idec_consts::CHIPID_BIT_START,
mss::exp::idec_consts::CHIPID_BIT_LENGTH>(l_chipBaseId);

// Location 0:3
// Empty 4:7
// ChipId 8:15
o_chipId = (l_location << 12) | l_chipBaseId;


// The revision/DD/EC level comes from EFUSE_IMAGE_OUT_3
FAPI_TRY(fapi2::getScom( i_target, static_cast<uint64_t>(EXPLR_EFUSE_IMAGE_OUT_3), l_efuse3_buffer ),
"exp_getidec: could not read explorer efuse_out3 register 0x%08x", EXPLR_EFUSE_IMAGE_OUT_3);

l_efuse3_buffer.extractToRight<mss::exp::idec_consts::REVISION_BIT_START,
mss::exp::idec_consts::REVISION_BIT_LENGTH>(l_revision);

// Due to limitations in what logic could be updated between revisions
// there is no explicit Major+Minor value available in the hardware.
// Instead we have to explicitly convert a rolling number into the
// standard major.minor DD value we expect.
o_chipEc = 0;

switch( l_revision )
{
case(0):
o_chipEc = 0x10;
break; //A.0

case(1):
o_chipEc = 0x11;
break; //A.1

case(2):
o_chipEc = 0x20;
break; //B.0
}

// Ensure we found a known level
FAPI_ASSERT(o_chipEc != 0,
fapi2::EXP_UNKNOWN_REVISION().
set_TARGET(i_target).
set_REVISION(l_revision).
set_CHIP_INFO_REG(l_chip_info_buffer).
set_EFUSE_IMAGE_OUT_3(l_efuse3_buffer),
"The %s revision (%d) does not match a known DD level.",
mss::c_str(i_target), l_revision);


FAPI_DBG("EC found 0x%.02x chipId found 0x%.04x", o_chipEc, o_chipId);

fapi_try_exit:
Expand Down
7 changes: 4 additions & 3 deletions src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* Contributors Listed Below - COPYRIGHT 2018,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -177,12 +177,13 @@ enum ecid_consts
enum idec_consts
{
EXPLR_CHIP_INFO_REG = 0x2134,
MAJOR_EC_BIT_START = 32,
MAJOR_EC_BIT_LENGTH = 4,
LOCATION_BIT_START = 44,
LOCATION_BIT_LENGTH = 4,
CHIPID_BIT_START = 56,
CHIPID_BIT_LENGTH = 8,

REVISION_BIT_START = 50,
REVISION_BIT_LENGTH = 4,
};


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50 changes: 50 additions & 0 deletions src/import/chips/ocmb/explorer/procedures/xml/error_info/exp_getidec.xml
View file
@@ -0,0 +1,50 @@
<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
<!-- $Source: src/import/chips/ocmb/explorer/procedures/xml/error_info/exp_getidec.xml $ -->
<!-- -->
<!-- OpenPOWER HostBoot Project -->
<!-- -->
<!-- Contributors Listed Below - COPYRIGHT 2020 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
<!-- you may not use this file except in compliance with the License. -->
<!-- You may obtain a copy of the License at -->
<!-- -->
<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
<!-- -->
<!-- Unless required by applicable law or agreed to in writing, software -->
<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
<!-- implied. See the License for the specific language governing -->
<!-- permissions and limitations under the License. -->
<!-- -->
<!-- IBM_PROLOG_END_TAG -->

<hwpErrors>

<hwpError>
<rc>RC_EXP_UNKNOWN_REVISION</rc>
<description>
The Explorer revision does not match a known DD level.
</description>
<ffdc>TARGET</ffdc>
<ffdc>REVISION</ffdc>
<ffdc>CHIP_INFO_REG</ffdc>
<ffdc>EFUSE_IMAGE_OUT_3</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
<callout>
<target>TARGET</target>
<priority>MEDIUM</priority>
</callout>
<deconfigure>
<target>TARGET</target>
</deconfigure>
</hwpError>

</hwpErrors>

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