Skip to content

Commit

Permalink
PRD: Updates from RAS XML v100
Browse files Browse the repository at this point in the history 
Change-Id: I9f86bb29267bd969dd89e431886ff9b5b84a1cfd
CQ: SW400169
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45412
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45570
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
  • Loading branch information
@zane131
zane131 committed Sep 5, 2017
1 parent ba3d796 commit 4632038
Show file tree
Hide file tree
Showing 9 changed files with 111 additions and 106 deletions.
11 changes: 7 additions & 4 deletions src/usr/diag/prdf/common/plat/p9/p9_common_actions.rule
View file
Expand Up @@ -99,11 +99,13 @@ actionclass threshold5pday
*/
actionclass threshold_and_mask
{
calloutSelfMed;
threshold32pday;
funccall("ClearServiceCallFlag");
};

actionclass threshold_and_mask_self { calloutSelfMed; threshold_and_mask; };
actionclass threshold_and_mask_level2 { callout2ndLvlMed; threshold_and_mask; };

################################################################################
# Special Flags #
################################################################################
Expand Down Expand Up @@ -211,9 +213,10 @@ actionclass level2_M_proc_L_th_1
# Callouts with flags #
################################################################################

actionclass level2_th_1_SUE { level2_th_1; SueSeen; };
actionclass self_th_1_SUE { self_th_1; SueSeen; };
actionclass self_th_1_UERE { self_th_1; SueSource; };
actionclass level2_th_1_SUE { level2_th_1; SueSeen; };
actionclass level2_th_1_UERE { level2_th_1; SueSource; };
actionclass self_th_1_SUE { self_th_1; SueSeen; };
actionclass self_th_1_UERE { self_th_1; SueSource; };

################################################################################
# Dump Types #
Expand Down
6 changes: 3 additions & 3 deletions src/usr/diag/prdf/common/plat/p9/p9_ec.rule
View file
Expand Up @@ -644,17 +644,17 @@ group gCOREFIR filter singlebit, cs_root_cause
/** COREFIR[33]
* Special recovery error, tlb multi-hit
*/
(rCOREFIR, bit(33)) ? threshold_and_mask;
(rCOREFIR, bit(33)) ? threshold_and_mask_self;

/** COREFIR[34]
* LSU SLB multihit error
*/
(rCOREFIR, bit(34)) ? threshold_and_mask;
(rCOREFIR, bit(34)) ? threshold_and_mask_self;

/** COREFIR[35]
* LSU ERAT multihit error
*/
(rCOREFIR, bit(35)) ? threshold_and_mask;
(rCOREFIR, bit(35)) ? threshold_and_mask_self;

/** COREFIR[36]
* Forward Progress Error
Expand Down
42 changes: 21 additions & 21 deletions src/usr/diag/prdf/common/plat/p9/p9_ex.rule
View file
Expand Up @@ -314,7 +314,7 @@ rule rL2FIR
L2FIR & ~L2FIR_MASK & ~L2FIR_ACT0 & L2FIR_ACT1;
};

group gL2FIR filter singlebit, cs_root_cause
group gL2FIR filter singlebit, cs_root_cause( 1, 17, 18, 20 )
{
/** L2FIR[0]
* L2 cache read CE
Expand All @@ -324,7 +324,7 @@ group gL2FIR filter singlebit, cs_root_cause
/** L2FIR[1]
* L2 cache read UE
*/
(rL2FIR, bit(1)) ? l2_cache_ue;
(rL2FIR, bit(1)) ? l2_cache_ue_UERE;

/** L2FIR[2]
* L2 cache read SUE
Expand Down Expand Up @@ -404,7 +404,7 @@ group gL2FIR filter singlebit, cs_root_cause
/** L2FIR[17]
* (RC) load received pb cresp addr error
*/
(rL2FIR, bit(17)) ? level2_th_1;
(rL2FIR, bit(17)) ? level2_th_1_UERE;

/** L2FIR[18]
* (RC) store received pb cresp addr error
Expand All @@ -419,7 +419,7 @@ group gL2FIR filter singlebit, cs_root_cause
/** L2FIR[20]
* RC or NCU Pb data UE error
*/
(rL2FIR, bit(20)) ? self_th_1;
(rL2FIR, bit(20)) ? self_th_1_UERE;

/** L2FIR[21]
* RC or NCU PB data SUE detected
Expand Down Expand Up @@ -474,7 +474,7 @@ group gL2FIR filter singlebit, cs_root_cause
/** L2FIR[36]
* Cache CE and UE in short time period
*/
(rL2FIR, bit(36)) ? self_th_1;
(rL2FIR, bit(36)) ? threshold_and_mask_self;

/** L2FIR[37:38]
* spare
Expand Down Expand Up @@ -560,7 +560,7 @@ group gNCUFIR filter singlebit, cs_root_cause( 8 )
/** NCUFIR[9]
* store timed out on pb
*/
(rNCUFIR, bit(9)) ? threshold_and_mask;
(rNCUFIR, bit(9)) ? threshold_and_mask_self;

/** NCUFIR[10]
* tlbie master timeout
Expand Down Expand Up @@ -651,7 +651,7 @@ rule rL3FIR
L3FIR & ~L3FIR_MASK & ~L3FIR_ACT0 & L3FIR_ACT1;
};

group gL3FIR filter singlebit, cs_root_cause
group gL3FIR filter singlebit, cs_root_cause( 5, 8, 11, 17, 21 )
{
/** L3FIR[0]
* L3_RDDSP_SEGR_LCO_ALL_MEM_UNAVAIL_ERR
Expand All @@ -666,7 +666,7 @@ group gL3FIR filter singlebit, cs_root_cause
/** L3FIR[3]
* L3 cache CE and UE within a short period
*/
(rL3FIR, bit(3)) ? self_th_1;
(rL3FIR, bit(3)) ? threshold_and_mask_self;

/** L3FIR[4]
* CE detected on L3 cache read
Expand All @@ -676,7 +676,7 @@ group gL3FIR filter singlebit, cs_root_cause
/** L3FIR[5]
* UE detected on L3 cache read
*/
(rL3FIR, bit(5)) ? l3_cache_ue;
(rL3FIR, bit(5)) ? l3_cache_ue_UERE;

/** L3FIR[6]
* SUE detected on L3 cache read
Expand All @@ -691,7 +691,7 @@ group gL3FIR filter singlebit, cs_root_cause
/** L3FIR[8]
* L3 cache write data UE from Power Bus
*/
(rL3FIR, bit(8)) ? self_th_1;
(rL3FIR, bit(8)) ? self_th_1_UERE;

/** L3FIR[9]
* L3 cache write data sue from Power Bus
Expand All @@ -706,7 +706,7 @@ group gL3FIR filter singlebit, cs_root_cause
/** L3FIR[11]
* L3 cache write data UE from L2
*/
(rL3FIR, bit(11)) ? l3_cache_ue;
(rL3FIR, bit(11)) ? l3_cache_ue_UERE;

/** L3FIR[12]
* L3 cache write SUE from L2
Expand Down Expand Up @@ -756,7 +756,7 @@ group gL3FIR filter singlebit, cs_root_cause
/** L3FIR[21]
* UE detected on PowerBus read for PPE
*/
(rL3FIR, bit(21)) ? self_th_1;
(rL3FIR, bit(21)) ? self_th_1_UERE;

/** L3FIR[22]
* L3 PPE SUE
Expand Down Expand Up @@ -882,12 +882,12 @@ group gCMEFIR filter singlebit, cs_root_cause
/** CMEFIR[8]
* SRAM Correctable Error
*/
(rCMEFIR, bit(8)) ? threshold_and_mask;
(rCMEFIR, bit(8)) ? threshold_and_mask_self;

/** CMEFIR[9]
* Scrub timer tick, scrub still pending
*/
(rCMEFIR, bit(9)) ? threshold_and_mask;
(rCMEFIR, bit(9)) ? threshold_and_mask_self;

/** CMEFIR[10]
* Block Copy Engine Error
Expand All @@ -902,37 +902,37 @@ group gCMEFIR filter singlebit, cs_root_cause
/** CMEFIR[13]
* Dropout detected on Core0 Chiplet iVRM
*/
(rCMEFIR, bit(13)) ? threshold_and_mask;
(rCMEFIR, bit(13)) ? threshold_and_mask_self;

/** CMEFIR[14]
* Dropout detected on Core1 Chiplet iVRM
*/
(rCMEFIR, bit(14)) ? threshold_and_mask;
(rCMEFIR, bit(14)) ? threshold_and_mask_self;

/** CMEFIR[15]
* CME Dropout Cache Chiplet iVRM.
*/
(rCMEFIR, bit(15)) ? threshold_and_mask;
(rCMEFIR, bit(15)) ? threshold_and_mask_self;

/** CMEFIR[16]
* CME Extreme Droop over time exceeded
*/
(rCMEFIR, bit(16)) ? threshold_and_mask;
(rCMEFIR, bit(16)) ? threshold_and_mask_self;

/** CMEFIR[17]
* CME Large Droop exceeded
*/
(rCMEFIR, bit(17)) ? threshold_and_mask;
(rCMEFIR, bit(17)) ? threshold_and_mask_self;

/** CMEFIR[18]
* CME Small Droop exceeded
*/
(rCMEFIR, bit(18)) ? threshold_and_mask;
(rCMEFIR, bit(18)) ? threshold_and_mask_self;

/** CMEFIR[19]
* Detected non-thermometer code
*/
(rCMEFIR, bit(19)) ? threshold_and_mask;
(rCMEFIR, bit(19)) ? threshold_and_mask_self;

/** CMEFIR[20]
* scom error
Expand Down
6 changes: 4 additions & 2 deletions src/usr/diag/prdf/common/plat/p9/p9_ex_actions.rule
View file
Expand Up @@ -31,8 +31,9 @@ actionclass l3_cache_ce
funccall("cacheCeWorkaround");
};

actionclass l3_cache_ue
actionclass l3_cache_ue_UERE
{
SueSource;
self_th_1;
funccall("L3UE");
};
Expand All @@ -58,8 +59,9 @@ actionclass l2_cache_ce
funccall("cacheCeWorkaround");
};

actionclass l2_cache_ue
actionclass l2_cache_ue_UERE
{
SueSource;
self_th_1;
funccall("L2UE");
};
Expand Down
2 changes: 1 addition & 1 deletion src/usr/diag/prdf/common/plat/p9/p9_mca.rule
View file
Expand Up @@ -523,7 +523,7 @@ group gMCAECCFIR filter priority( 14, 17, 37 ), # ensure UEs handled before NCEs
/** MCAECCFIR[41]
* SCOM_PARITY_CLASS_STATUS
*/
(rMCAECCFIR, bit(41)) ? threshold_and_mask;
(rMCAECCFIR, bit(41)) ? threshold_and_mask_self;

/** MCAECCFIR[42]
* SCOM_PARITY_CLASS_RECOVERABLE
Expand Down
2 changes: 1 addition & 1 deletion src/usr/diag/prdf/common/plat/p9/p9_mcs.rule
View file
Expand Up @@ -234,7 +234,7 @@ group gMCFIR filter singlebit, cs_root_cause( 0, 6, 8, 9 )
/** MCFIR[8]
* command list timeout
*/
(rMCFIR, bit(8)) ? level2_th_1;
(rMCFIR, bit(8)) ? threshold_and_mask_level2;

/** MCFIR[9]
* channel 0 timeout
Expand Down

0 comments on commit 4632038

Please sign in to comment.