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Add current istep into TI SRC
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Word4 of the SRC is defined to be the 'last progress code' for
FSP SRCs.  For Hostboot TIs, we currently leave that word zero.
This change will add the same data that we put into the scratch
register 5 into word4 so that we will have the failing istep for
any TI we encounter.

Change-Id: Iaf5ec835d45b1ea3a6ced20b5b7f7d07216c548e
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88813
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
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dcrowell77 authored and Nicholas E Bofferding committed Dec 18, 2019
1 parent 75c0908 commit 4638dc5
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Showing 3 changed files with 26 additions and 2 deletions.
13 changes: 12 additions & 1 deletion src/include/kernel/terminate.H
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2012,2018 */
/* Contributors Listed Below - COPYRIGHT 2012,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -87,4 +87,15 @@ void termModifySRC(uint8_t i_moduleID,
*/
void termSetHbDump(void);

/** @fn termSetIstep
*
* @brief Set istep into progress code word of the SRC.
*
* @param[in] i_istep: Encoded istep value
* @param[out] NONE:
*
* @return Nothing
*/
void termSetIstep(uint32_t i_istep);

#endif
11 changes: 10 additions & 1 deletion src/kernel/terminate.C
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2012,2018 */
/* Contributors Listed Below - COPYRIGHT 2012,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -128,4 +128,13 @@ void termSetHbDump(void)

return;
}

void termSetIstep(uint32_t i_istep)
{
// Set istep into progress code word of the SRC
kernel_TIDataArea.src.SRCword4 = i_istep;
return;
}


#endif // BOOTLOADER
4 changes: 4 additions & 0 deletions src/usr/initservice/istepdispatcher/istepdispatcher.C
Expand Up @@ -93,6 +93,7 @@
#include <p9_perv_scom_addresses.H>
// ---------------------------
#include <initservice/extinitserviceif.H>
#include <kernel/terminate.H>


namespace ISTEPS_TRACE
Expand Down Expand Up @@ -2507,6 +2508,9 @@ errlHndl_t IStepDispatcher::sendProgressCode(bool i_needsLock)
Util::writeScratchReg( SPLESS::MBOX_SCRATCH_REG5,
l_scratch5.data32 );

//--- Push the scratch reg into kernel to be added into TI area
termSetIstep(l_scratch5.data32);

#ifdef CONFIG_ISTEP_LPC_PORT80_DEBUG
// Starting port 80h value for hostboot isteps. Each step started will
// increase the value by one.
Expand Down

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