Undo psave default commit

Change-Id: I3d68ac2d4b1ce896a59829b4d976d378bb346afe Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44543 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44545 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
open-power · Sep 7, 2017 · 584d488 · 584d488
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commit 584d488
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diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C
@@ -29,11 +29,6 @@
 
 using namespace fapi2;
 
-constexpr uint64_t literal_0b11100 = 0b11100;
-constexpr uint64_t literal_0b00011 = 0b00011;
-constexpr uint64_t literal_0x01 = 0x01;
-constexpr uint64_t literal_0xFF = 0xFF;
-constexpr uint64_t literal_0b001 = 0b001;
 constexpr uint64_t literal_0 = 0;
 constexpr uint64_t literal_0x1 = 0x1;
 constexpr uint64_t literal_0x20 = 0x20;
@@ -91,16 +86,6 @@ fapi2::ReturnCode p9_fbc_ioe_tl_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC
         fapi2::ATTR_CHIP_EC_FEATURE_HW384245_Type l_TGT0_ATTR_CHIP_EC_FEATURE_HW384245;
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW384245, TGT0, l_TGT0_ATTR_CHIP_EC_FEATURE_HW384245));
         fapi2::buffer<uint64_t> l_scom_buffer;
-        {
-            FAPI_TRY(fapi2::getScom( TGT0, 0x501241aull, l_scom_buffer ));
-
-            l_scom_buffer.insert<35, 5, 59, uint64_t>(literal_0b11100 );
-            l_scom_buffer.insert<27, 5, 59, uint64_t>(literal_0b00011 );
-            l_scom_buffer.insert<16, 8, 56, uint64_t>(literal_0x01 );
-            l_scom_buffer.insert<8, 8, 56, uint64_t>(literal_0xFF );
-            l_scom_buffer.insert<5, 3, 61, uint64_t>(literal_0b001 );
-            FAPI_TRY(fapi2::putScom(TGT0, 0x501241aull, l_scom_buffer));
-        }
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x501340aull, l_scom_buffer ));
 

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C
@@ -62,7 +62,6 @@ const uint64_t FBC_IOE_DL_FIR_ACTION0 = 0x0000000000000000ULL;
 const uint64_t FBC_IOE_DL_FIR_ACTION1 = 0x0303C00000001FFCULL;
 const uint64_t FBC_IOE_DL_FIR_MASK    = 0xFCFC3FFFFFFFE003ULL;
 
-const uint64_t FBC_IOE_TL_PSAVE_CFG   = 0xF1FF01031C000000ULL;
 
 //------------------------------------------------------------------------------
 // Function definitions
@@ -115,8 +114,6 @@ fapi2::ReturnCode p9_chiplet_fabric_scominit(const fapi2::Target<fapi2::TARGET_T
                  "Error from putScom (PU_PB_IOE_FIR_ACTION1_REG)");
         FAPI_TRY(fapi2::putScom(i_target, PU_PB_IOE_FIR_MASK_REG, FBC_IOE_TL_FIR_MASK),
                  "Error from putScom (PU_PB_IOE_FIR_MASK_REG)");
-        FAPI_TRY(fapi2::putScom(i_target, PU_PB_PSAVE_CFG, FBC_IOE_TL_PSAVE_CFG),
-                 "Error from putScom (PU_PB_PSAVE_CFG)");
     }
 
     // setup IOE (XBUS FBC IO) DL SCOMs