xip_customize: GPTR/overlays stage 1 support

Updated to poll Nimbus DD level and whether there's support
for overlays in the XIP interface.

Further, updated to add three extra args in xip_customize API, two
of which are to support a third ring work buffer for the overlays
handling. This has necessitated making changes to hcode_image_build
(HIB) API as well.

Note that the calling codes of xip_customize and HIB need to be
updated to supply the additional args in their APIs.

Note that this code stage 1 will work for Nimbus DD2 with Gptr
rings in Mvpd, and no Gptr rings in the HW image.  It will, however,
not work if there's content in .overlays or if there's Gptr rings
already in the .rings section. Thus, the stage 1 code here will
work with a DD2 image (i.e., that does NOT have Gptr rings in
.rings in HW image) as long as noone has put any real Gptr
initfiles in for processing (which would result in ring content
in .overlays). We must ensure that the stage 2 code of xip_customize
gets merged on the HB side to enable processing of .overlays content
before we actually add any Gptr initfiles for the .overlays section
into EKB.

Change-Id: I3d6ab8a9add239c92819613dcae21ef5faf0a1c5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40591
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40898
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Tested-by: Dean Sanner <dsanner@us.ibm.com>

src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.H

@@ -30,16 +30,19 @@
 
 typedef fapi2::ReturnCode (*p9_xip_customize_FP_t) (
     const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_proc_target,
+    void*     i_hwImage,
     void*     io_image,
     uint32_t& io_imageSize,
     void*     io_ringSectionBuf,
     uint32_t& io_ringSectionBufSize,
     uint8_t   i_sysPhase,
     uint8_t   i_modeBuild,
-    void*     io_ringBuf1,
+    void*     i_ringBuf1,
     uint32_t  i_ringBufSize1,
-    void*     io_ringBuf2,
+    void*     i_ringBuf2,
     uint32_t  i_ringBufSize2,
+    void*     i_ringBuf3,
+    uint32_t  i_ringBufSize3,
     uint32_t& io_bootCoreMask);
 
 extern "C"
@@ -48,6 +51,7 @@ extern "C"
 ///        mailbox attributes, VPD rings and other stuff.
 ///
 /// @param[in] i_proc_target             => P9 proc chip target
+/// @param[in] i_hwImage                 => HW image
 /// @param[in/out] io_image              => Pointer to an in-memory image
 ///                                         HB_SBE:
 ///                                             In:  SBE image
@@ -80,14 +84,18 @@ extern "C"
 ///                                             Out: Final size
 /// @param[in] i_sysPhase                => ={HB_SBE, RT_CME, RT_SGPE}
 /// @param[in] i_modeBuild               => ={IPL, REBUILD}
-/// @param[in/out] io_ringBuf1           => Caller supplied in-memory buffer
-///                                         for uncompressed VPD rings in
+/// @param[in] i_ringBuf1                => Caller supplied in-memory buffer
+///                                         for VPD rings
 /// @param[in] i_ringBufSize1            => Max size of VPD ring buffer
 ///                                         (Should equal MAX_RING_BUF_SIZE)
-/// @param[in/out] io_ringBuf2           => Caller supplied in-memory buffer
-///                                         for uncompressed overlay rings
+/// @param[in] i_ringBuf2                => Caller supplied in-memory buffer
+///                                         for overlay rings
 /// @param[in] i_ringBufSize2            => Max size of overlay ring buffer
 ///                                         (Should equal MAX_RING_BUF_SIZE)
+/// @param[in] i_ringBuf3                => Caller supplied in-memory buffer
+///                                         to hold scratchpad rings
+/// @param[in] i_ringBufSize3            => Max size of overlay ring buffer
+///                                         (Should equal MAX_RING_BUF_SIZE)
 /// @param[in/out] io_bootCoreMask       => In: Mask of the desired boot cores
 ///                                         Out: Actual boot cores
 ///                                         (Only used in HB_SBE sysPhase)
@@ -97,33 +105,38 @@ extern "C"
 ///
     fapi2::ReturnCode p9_xip_customize (
         const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_proc_target,
+        void*     i_hwImage,
         void*     io_image,
         uint32_t& io_imageSize,
         void*     io_ringSectionBuf,
         uint32_t& io_ringSectionBufSize,
         uint8_t   i_sysPhase,
         uint8_t   i_modeBuild,
-        void*     io_ringBuf1,
+        void*     i_ringBuf1,
         uint32_t  i_ringBufSize1,
-        void*     io_ringBuf2,
+        void*     i_ringBuf2,
         uint32_t  i_ringBufSize2,
+        void*     i_ringBuf3,
+        uint32_t  i_ringBufSize3,
         uint32_t& io_bootCoreMask);
-
 }
 #else
 extern "C" {
     int p9_xip_customize (
         int& i_proc_target,
-        void*     i_image,
+        void*     i_hwImage,
+        void*     io_image,
         uint32_t& io_imageSize,
-        void*     i_ringSectionBuf,
+        void*     io_ringSectionBuf,
         uint32_t& io_ringSectionBufSize,
         uint8_t   i_sysPhase,
         uint8_t   i_modeBuild,
         void*     i_ringBuf1,
         uint32_t  i_ringBufSize1,
         void*     i_ringBuf2,
         uint32_t  i_ringBufSize2,
+        void*     i_ringBuf3,
+        uint32_t  i_ringBufSize3,
         uint32_t& io_bootCoreMask);
 }
 #endif

src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C

@@ -149,16 +149,21 @@ struct RingBufData
     uint32_t     iv_sizeWorkBuf1;
     void* iv_pWorkBuf2;
     uint32_t     iv_sizeWorkBuf2;
+    void* iv_pWorkBuf3;
+    uint32_t     iv_sizeWorkBuf3;
 
     RingBufData( void* i_pRingBuf1, const uint32_t i_ringSize,
                  void* i_pWorkBuf1, const uint32_t i_sizeWorkBuf1,
-                 void* i_pWorkBuf2, const uint32_t i_sizeWorkBuf2 ) :
+                 void* i_pWorkBuf2, const uint32_t i_sizeWorkBuf2,
+                 void* i_pWorkBuf3, const uint32_t i_sizeWorkBuf3 ) :
         iv_pRingBuffer( i_pRingBuf1),
         iv_ringBufSize(i_ringSize),
         iv_pWorkBuf1( i_pWorkBuf1 ),
         iv_sizeWorkBuf1( i_sizeWorkBuf1 ),
         iv_pWorkBuf2( i_pWorkBuf2 ),
-        iv_sizeWorkBuf2( i_sizeWorkBuf2 )
+        iv_sizeWorkBuf2( i_sizeWorkBuf2 ),
+        iv_pWorkBuf3( i_pWorkBuf3 ),
+        iv_sizeWorkBuf3( i_sizeWorkBuf3 )
 
     {}
 
@@ -168,7 +173,9 @@ struct RingBufData
         iv_pWorkBuf1( NULL ),
         iv_sizeWorkBuf1( 0 ),
         iv_pWorkBuf2( NULL ),
-        iv_sizeWorkBuf2( 0 )
+        iv_sizeWorkBuf2( 0 ),
+        iv_pWorkBuf3( NULL ),
+        iv_sizeWorkBuf3( 0 )
     { }
 };
 
@@ -549,7 +556,8 @@ fapi_try_exit:
 fapi2::ReturnCode validateInputArguments( void* const i_pImageIn, void* i_pImageOut,
         SysPhase_t i_phase, ImageType_t i_imgType,
         void* i_pBuf1, uint32_t i_bufSize1, void* i_pBuf2,
-        uint32_t i_bufSize2, void* i_pBuf3, uint32_t i_bufSize3 )
+        uint32_t i_bufSize2, void* i_pBuf3, uint32_t i_bufSize3,
+        void* i_pBuf4, uint32_t i_bufSize4 )
 {
     uint32_t l_rc = IMG_BUILD_SUCCESS;
     uint32_t hwImagSize = 0;
@@ -600,6 +608,11 @@ fapi2::ReturnCode validateInputArguments( void* const i_pImageIn, void* i_pImage
                  .set_TEMP3_BUF_SIZE( i_bufSize3 ),
                  "Invalid temp buffer3 passed for hcode image build" );
 
+    FAPI_ASSERT( ( i_pBuf4 != NULL ),
+                 fapi2::HCODE_INVALID_TEMP4_BUF()
+                 .set_TEMP4_BUF_SIZE( i_bufSize4 ),
+                 "Invalid temp buffer4 passed for hcode image build" );
+
     FAPI_ASSERT( ( i_bufSize1 != 0  ) ,
                  fapi2::HCODE_INVALID_TEMP1_BUF_SIZE()
                  .set_TEMP1_BUF_SIZE( i_bufSize1 ),
@@ -615,6 +628,11 @@ fapi2::ReturnCode validateInputArguments( void* const i_pImageIn, void* i_pImage
                  .set_TEMP3_BUF_SIZE( i_bufSize3 ),
                  "Invalid size for temp buf3 passed for hcode image build" );
 
+    FAPI_ASSERT( ( i_bufSize4 != 0 ),
+                 fapi2::HCODE_INVALID_TEMP4_BUF_SIZE()
+                 .set_TEMP4_BUF_SIZE( i_bufSize4 ),
+                 "Invalid size for temp buf4 passed for hcode image build" );
+
     FAPI_ASSERT( ( i_imgType.isBuildValid() ),
                  fapi2::HCODE_INVALID_IMG_TYPE(),
                  "Invalid image type passed for hcode image build" );
@@ -1679,13 +1697,16 @@ uint32_t getPpeScanRings( void* const     i_pHwImage,
                  (uintptr_t)(i_ringData.iv_pWorkBuf1), i_ringData.iv_sizeWorkBuf1);
         FAPI_DBG("Work buf2 (buf,size)=(0x%016llX,0x%08X)",
                  (uintptr_t)(i_ringData.iv_pWorkBuf2), i_ringData.iv_sizeWorkBuf2);
+        FAPI_DBG("Work buf2 (buf,size)=(0x%016llX,0x%08X)",
+                 (uintptr_t)(i_ringData.iv_pWorkBuf3), i_ringData.iv_sizeWorkBuf3);
         FAPI_DBG("---------------=== Buffer Specs Ends --------------------");
 
         FAPI_DBG("--------------- Buffer Initializaiton to 0 --------------------");
         //Init all temp buffers before using.
         memset( (uint8_t*) i_ringData.iv_pRingBuffer,  0x00, i_ringData.iv_ringBufSize );
         memset( (uint8_t*) i_ringData.iv_pWorkBuf1, 0x00, i_ringData.iv_sizeWorkBuf1 );
         memset( (uint8_t*) i_ringData.iv_pWorkBuf2, 0x00, i_ringData.iv_sizeWorkBuf2 );
+        memset( (uint8_t*) i_ringData.iv_pWorkBuf3, 0x00, i_ringData.iv_sizeWorkBuf3 );
 
         uint32_t l_bootMask = ENABLE_ALL_CORE;
         fapi2::ReturnCode l_fapiRc = fapi2::FAPI2_RC_SUCCESS;
@@ -1694,6 +1715,7 @@ uint32_t getPpeScanRings( void* const     i_pHwImage,
                        p9_xip_customize,
                        i_procTgt,
                        i_pHwImage,
+                       i_pHwImage,
                        hwImageSize,
                        i_ringData.iv_pRingBuffer,
                        i_ringData.iv_ringBufSize,
@@ -1703,6 +1725,8 @@ uint32_t getPpeScanRings( void* const     i_pHwImage,
                        i_ringData.iv_sizeWorkBuf1,
                        i_ringData.iv_pWorkBuf2,
                        i_ringData.iv_sizeWorkBuf2,
+                       i_ringData.iv_pWorkBuf3,
+                       i_ringData.iv_sizeWorkBuf3,
                        l_bootMask );
 
         if( l_fapiRc )
@@ -3923,7 +3947,9 @@ fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt,
                                         void* const     i_pBuf2,
                                         const uint32_t  i_sizeBuf2,
                                         void* const     i_pBuf3,
-                                        const uint32_t  i_sizeBuf3 )
+                                        const uint32_t  i_sizeBuf3,
+                                        void* const     i_pBuf4,
+                                        const uint32_t  i_sizeBuf4 )
 
 
 {
@@ -3946,7 +3972,9 @@ fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt,
                             i_pBuf2,
                             i_sizeBuf2,
                             i_pBuf3,
-                            i_sizeBuf3 );
+                            i_sizeBuf3,
+                            i_pBuf4,
+                            i_sizeBuf4 );
 
     FAPI_TRY( validateInputArguments( i_pImageIn,
                                       i_pHomerImage,
@@ -3957,7 +3985,9 @@ fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt,
                                       i_pBuf2,
                                       i_sizeBuf2,
                                       i_pBuf3,
-                                      i_sizeBuf3 ),
+                                      i_sizeBuf3,
+                                      i_pBuf4,
+                                      i_sizeBuf4 ),
               "Invalid arguments, escaping hcode image build" );
 
     // HW Image is a nested XIP Image. Let us read global TOC of hardware image

src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H

@@ -138,7 +138,9 @@ extern "C"
       void*  const    i_pBuf2,
       const  uint32_t  i_sizeBuf2,
       void*  const    i_pBuf3,
-      const  uint32_t  i_sizeBuf3 );
+      const  uint32_t  i_sizeBuf3,
+      void*  const    i_pBuf4,
+      const  uint32_t  i_sizeBuf4 );
 
     /**
     * @brief   builds a STOP image using a refrence image as input.
@@ -152,8 +154,10 @@ extern "C"
     * @param   i_sizeBuf1       size of work buffer1. Minimum size expected HW_IMG_RING_SIZE.
     * @param   i_pBuf2          pointer to a work buffer2. Minimum size expected WORK_BUF_SIZE.
     * @param   i_sizeBuf2       size of work buffer2
-    * @param   i_pBuf3          pointer to a work buffer2. Minimum size expected WORK_BUF_SIZE.
-    * @param   i_sizeBuf3       size of work buffer2
+    * @param   i_pBuf3          pointer to a work buffer3. Minimum size expected WORK_BUF_SIZE.
+    * @param   i_sizeBuf3       size of work buffer3
+    * @param   i_pBuf4          pointer to a work buffer4. Minimum size expected WORK_BUF_SIZE.
+    * @param   i_sizeBuf4       size of work buffer4
     * @note    needs attribute ATTR_EC
     */
     fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt,
@@ -167,6 +171,8 @@ extern "C"
                                             void* const    i_pBuf2,
                                             const uint32_t  i_sizeBuf2,
                                             void* const    i_pBuf3,
-                                            const uint32_t  i_sizeBuf3 );
+                                            const uint32_t  i_sizeBuf3,
+                                            void* const    i_pBuf4,
+                                            const uint32_t  i_sizeBuf4 );
 } // extern C
 #endif //__HCODE_IMG_BUILD_H_

src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml

@@ -4178,4 +4178,23 @@
     </chipEcFeature>
   </attribute>
   <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_NO_GPTR_SUPPORT_VIA_MVPD</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+        indicaes if there is  GPTR support through MVPD which there will NOT be if
+        Nimbus DD1
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ********************************************************************* -->
+
 </attributes>

src/import/chips/p9/procedures/xml/error_info/p9_hcode_image_build_errors.xml

@@ -128,6 +128,26 @@
     </callout>
   </hwpError>
   <!-- *********************************************************************** -->
+  <hwpError>
+    <rc>RC_HCODE_INVALID_TEMP4_BUF</rc>
+    <description>Temporary buffer4 is invalid.</description>
+    <ffdc>TEMP4_BUF_SIZE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+  <!-- *********************************************************************** -->
+  <hwpError>
+    <rc>RC_HCODE_INVALID_TEMP4_BUF_SIZE</rc>
+    <description>Invalid size for temp buf4</description>
+    <ffdc>TEMP4_BUF_SIZE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+  <!-- *********************************************************************** -->
   <hwpError>
     <rc>RC_HCODE_INVALID_IMG_TYPE</rc>
     <description>Invalid image type passed for hcode image build.</description>

src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml

@@ -44,10 +44,12 @@
       <priority>HIGH</priority>
     </callout>
     <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>HW_IMAGE</ffdc>
     <ffdc>IMAGE_BUF</ffdc>
     <ffdc>RING_SECTION_BUF</ffdc>
     <ffdc>RING_BUF1</ffdc>
     <ffdc>RING_BUF2</ffdc>
+    <ffdc>RING_BUF3</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
@@ -63,6 +65,7 @@
     <ffdc>RING_SECTION_BUF_SIZE</ffdc>
     <ffdc>RING_BUF_SIZE1</ffdc>
     <ffdc>RING_BUF_SIZE2</ffdc>
+    <ffdc>RING_BUF_SIZE3</ffdc>
     <ffdc>OCCURRENCE</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->

src/import/chips/p9/xip/p9_xip_image.C

@@ -3264,11 +3264,6 @@ int p9_xip_dd_section_support(const void* i_image,
     int rc;
     P9XipSection section;
 
-    if (i_sectionId == P9_XIP_SECTION_HW_OVERLAYS)
-    {
-        return P9_XIP_OVERLAYS_NOT_SUPPORTED;
-    }
-
     rc = p9_xip_get_section(i_image, i_sectionId, &section);
 
     if (!rc)

src/include/usr/sbe/sbe_update.H

@@ -139,15 +139,17 @@ namespace SBE
     //
     // 256K - 316K  = Ring buf1
     // 316K - 376K  = Ring buf2
-    // 376K - 632K  = Ring Section buf
+    // 376k - 436k  = Ring buf3
+    // 436K - 692K  = Ring Section buf
     // ---- ALT use 256K-632K for SBE ECC image
-    // 632K - 888K  = SBE + HBBL image
+    // 692K - 948K  = SBE + HBBL image
     enum {
         FIXED_SEEPROM_WORK_SPACE = 256 * 1024,
         SBE_IMG_VADDR = VMM_VADDR_SBE_UPDATE,
         RING_BUF1_VADDR = FIXED_SEEPROM_WORK_SPACE + SBE_IMG_VADDR,
         RING_BUF2_VADDR = RING_BUF1_VADDR + MAX_RING_BUF_SIZE,
-        RING_SEC_VADDR  = RING_BUF2_VADDR + MAX_RING_BUF_SIZE,
+        RING_BUF3_VADDR = RING_BUF2_VADDR + MAX_RING_BUF_SIZE,
+        RING_SEC_VADDR  = RING_BUF3_VADDR + MAX_RING_BUF_SIZE,
         //NOTE: recycling the same memory space for different
         //steps in the process.
         SBE_ECC_IMG_VADDR = RING_BUF1_VADDR,
@@ -431,6 +433,7 @@ namespace SBE
      * @return errlHndl_t    Error log handle on failure.
      */
     errlHndl_t procCustomizeSbeImg(TARGETING::Target* i_target,
+                                   void* i_hwImgPtr,
                                    void* i_sbeImgPtr,
                                    size_t i_maxImgSize,
                                    void* io_imgPtr,

src/include/usr/vmmconst.h

@@ -100,7 +100,7 @@
 
 /** SBE Update process is at 3GB, uses 512KB */
 #define VMM_VADDR_SBE_UPDATE (3 * GIGABYTE)
-#define VMM_SBE_UPDATE_SIZE (900 * KILOBYTE)
+#define VMM_SBE_UPDATE_SIZE (1024 * KILOBYTE)
 #define VMM_VADDR_SBE_UPDATE_END (VMM_VADDR_SBE_UPDATE + VMM_SBE_UPDATE_SIZE)
 /** Debug Comm Channel is at 3.5GB, uses 32KB */
 #define VMM_VADDR_DEBUG_COMM ((3 * GIGABYTE) + (500 * MEGABYTE))