Update p9_sbe_i2c_bit_rate_divisor_setting to set I2C Rate Valid bit

  - Set Bit 1 (SBE I2C Bus speed based, ref clock valid) on Mailbox
    Scratch Reg 8 (CFAM 283F) to indicate the i2c bit rate divisor
    (set in Mailbox Scratch Reg 2) is correct

  - Without this change if the SBE needs to be restarted after a
    reset/reload it will use the default i2c divisor value which
    isn't always correct

Change-Id: I2d0f071a0af42278bac886fce04a08d0c38682eb
CQ: SW440895
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64697
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64705
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

src/import/chips/p9/procedures/hwp/perv/p9_sbe_hreset.C

@@ -71,7 +71,7 @@ fapi2::ReturnCode p9_sbe_i2c_bit_rate_divisor_setting(
     l_data64.insertFromRight< 0, 16 >(l_mb_bit_rate_divisor);
     FAPI_TRY(fapi2::putScom(i_target_chip, PU_MODE_REGISTER_B, l_data64));
 
-    FAPI_INF("Writing I2C bit rate divisor into mailbox_reg_2");
+    FAPI_INF("Writing I2C bit rate divisor into mailbox_reg_2 AND writing i2c valid bit into mailbox_reg_8");
 #ifndef __HOSTBOOT_RUNTIME
 
     if (i_masterProc)
@@ -81,6 +81,12 @@ fapi2::ReturnCode p9_sbe_i2c_bit_rate_divisor_setting(
         l_data64.insertFromRight< 0, 16 >(l_mb_bit_rate_divisor);
         FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Master proc Scratch2 0x%.16llX", l_data64);
         FAPI_TRY(fapi2::putScom(i_target_chip, PERV_SCRATCH_REGISTER_2_SCOM, l_data64));
+
+        FAPI_TRY(fapi2::getScom(i_target_chip, PERV_SCRATCH_REGISTER_8_SCOM, l_data64));
+        FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Master proc Scratch8 0x%.16llX (before insert)", l_data64);
+        l_data64.insertFromRight< 1, 1 >(1);
+        FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Master proc Scratch8 0x%.16llX", l_data64);
+        FAPI_TRY(fapi2::putScom(i_target_chip, PERV_SCRATCH_REGISTER_8_SCOM, l_data64));
     }
 
 #ifndef __HOSTBOOT_RUNTIME
@@ -90,6 +96,12 @@ fapi2::ReturnCode p9_sbe_i2c_bit_rate_divisor_setting(
         l_data32.insertFromRight< 0, 16 >(l_mb_bit_rate_divisor);
         FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Slave proc Scratch2 0x%.8X", l_data32);
         FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_SCRATCH_REGISTER_2_FSI, l_data32));
+
+        FAPI_TRY(fapi2::getScom(i_target_chip, PERV_SCRATCH_REGISTER_8_SCOM, l_data64));
+        FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Slave proc Scratch8 0x%.16llX (before insert)", l_data64);
+        l_data64.insertFromRight< 1, 1 >(1);
+        FAPI_INF("p9_sbe_i2c_bit_rate_divisor_setting - Slave proc Scratch8 0x%.16llX", l_data64);
+        FAPI_TRY(fapi2::putScom(i_target_chip, PERV_SCRATCH_REGISTER_8_SCOM, l_data64));
     }
 
 #endif