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Change p9a_mss_freq to work on PROC_CHIP target
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Previously p9a_mss_freq ran on the MEM_PORT target, even though
the freq domain is at the PROC_CHIP level. This change will allow
DDIMMs to be binned to the same freq across the domain.
Also removes a lot of FAPI_INF messages to reduce UT log size.

Change-Id: I7d4e2ee8897fdd62c0672d96cc1731c7a14643dd
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88736
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Dev-Ready: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89672
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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@stermole @dcrowell77
stermole authored and dcrowell77 committed Jan 29, 2020
1 parent 1a19ea2 commit 6b29b38
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Showing 18 changed files with 167 additions and 145 deletions.
4 changes: 1 addition & 3 deletions src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_mss_eff_config_thermal.C
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2019 */
/* Contributors Listed Below - COPYRIGHT 2019,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -175,10 +175,8 @@ extern "C"
{
//Set runtime throttles to worst case between ATTR_EXP_MEM_THROTTLED_N_COMMANDS_PER_SLOT
//and ATTR_EXP_MEM_RUNTIME_THROTTLED_N_COMMANDS_PER_SLOT and the _PORT equivalents also
FAPI_INF("Starting update");
FAPI_TRY( mss::power_thermal::update_runtime_throttle(l_ocmb), "Error in exp_mss_eff_config_thermal for %d",
mss::c_str(l_ocmb));
FAPI_INF("finished update");
}
}

Expand Down
10 changes: 1 addition & 9 deletions src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/power_thermal/exp_throttle.C
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2019 */
/* Contributors Listed Below - COPYRIGHT 2019,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -61,9 +61,6 @@ namespace power_thermal
fapi2::ReturnCode pwr_throttles( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target,
const mss::throttle_type i_throttle_type)
{
FAPI_INF("Start pwr_throttles for %s type throttling for %s",
(( i_throttle_type == mss::throttle_type::THERMAL) ? "THERMAL" : "POWER"), mss::c_str(i_target));

if (mss::count_dimm (i_target) == 0)
{
return fapi2::FAPI2_RC_SUCCESS;
Expand Down Expand Up @@ -109,7 +106,6 @@ fapi2::ReturnCode pwr_throttles( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHI
FAPI_TRY(mss::attr::set_mem_throttled_n_commands_per_port( l_port_target, l_port));
}

FAPI_INF("End pwr_throttles for %s", mss::c_str(i_target));
return fapi2::current_err;

fapi_try_exit:
Expand All @@ -128,9 +124,6 @@ fapi_try_exit:
fapi2::ReturnCode equalize_throttles( const std::vector< fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> >& i_targets,
const mss::throttle_type i_throttle_type)
{
FAPI_INF("Start equalize_throttles for %s type throttling",
(( i_throttle_type == mss::throttle_type::THERMAL) ? "THERMAL" : "POWER"));

std::vector< fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT> > l_exceeded_power;

// Set all of the throttles to the lowest value per port for performance reasons
Expand All @@ -143,7 +136,6 @@ fapi2::ReturnCode equalize_throttles( const std::vector< fapi2::Target<fapi2::TA
fapi2::current_err = fapi2::FAPI2_RC_FALSE;
}

FAPI_INF("End equalize_throttles");
return fapi2::current_err;

fapi_try_exit:
Expand Down
16 changes: 15 additions & 1 deletion src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/utils/explorer_pos.C
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2019 */
/* Contributors Listed Below - COPYRIGHT 2019,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -89,4 +89,18 @@ relative_pos<fapi2::TARGET_TYPE_MEM_PORT>(const fapi2::Target<fapi2::TARGET_TYPE
return 0;
}

///
/// @brief Return a mem_port's relative position from a proc_chip
/// @param[in] i_target a target representing the target in question
/// @return The position relative to chiplet R
///
template<>
posTraits<fapi2::TARGET_TYPE_MEM_PORT>::pos_type
relative_pos<fapi2::TARGET_TYPE_PROC_CHIP>(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target)
{
typedef mcTypeTraits<mc_type::EXPLORER> TT;
return fapi_pos(i_target) % (TT::PORTS_PER_OCMB * TT::OCMB_PER_OMI * TT::OMI_PER_MCC * TT::MCC_PER_MI * TT::MI_PER_MC *
TT::MC_PER_PROC);
}

}// mss
3 changes: 2 additions & 1 deletion src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_freq_traits.H
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2019 */
/* Contributors Listed Below - COPYRIGHT 2019,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -57,6 +57,7 @@ class frequency_traits<mss::proc_type::NIMBUS>
//////////////////////////////////////////////////////////////
static constexpr fapi2::TargetType PORT_TARGET_TYPE = fapi2::TARGET_TYPE_MCA;
static constexpr fapi2::TargetType FREQ_TARGET_TYPE = fapi2::TARGET_TYPE_MCBIST;
static constexpr fapi2::TargetType FREQ_DOMAIN_TARGET_TYPE = fapi2::TARGET_TYPE_MCBIST;
static constexpr fapi2::TargetType VPD_TARGET_TYPE = fapi2::TARGET_TYPE_MCS;

//////////////////////////////////////////////////////////////
Expand Down
7 changes: 4 additions & 3 deletions src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2019 */
/* Contributors Listed Below - COPYRIGHT 2019,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -56,14 +56,15 @@ class frequency_traits<mss::proc_type::AXONE>
//////////////////////////////////////////////////////////////
static constexpr fapi2::TargetType PORT_TARGET_TYPE = fapi2::TARGET_TYPE_MEM_PORT;
static constexpr fapi2::TargetType FREQ_TARGET_TYPE = fapi2::TARGET_TYPE_MEM_PORT;
static constexpr fapi2::TargetType FREQ_DOMAIN_TARGET_TYPE = fapi2::TARGET_TYPE_PROC_CHIP;
static constexpr fapi2::TargetType VPD_TARGET_TYPE = fapi2::TARGET_TYPE_OCMB_CHIP;

//////////////////////////////////////////////////////////////
// Traits values
//////////////////////////////////////////////////////////////
static const std::vector<uint64_t> SUPPORTED_FREQS;
// MEM_PORT is our frequency domain. So 1 port per domain
static constexpr uint64_t PORTS_PER_FREQ_DOMAIN = 1;
// PROC_CHIP is our frequency domain
static constexpr uint64_t PORTS_PER_FREQ_DOMAIN = 16;
// Max DIMM's per port
static constexpr uint64_t MAX_DIMM_PER_PORT = 2;
// Maxium number of primary ranks on a DIMM
Expand Down
87 changes: 48 additions & 39 deletions src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2019 */
/* Contributors Listed Below - COPYRIGHT 2019,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -104,10 +104,13 @@ fapi_try_exit:
///
template<>
fapi2::ReturnCode set_freq<mss::proc_type::AXONE>(
const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
const uint64_t i_freq)
{
FAPI_TRY( mss::attr::set_freq(i_target, i_freq) );
for (const auto& l_port : mss::find_targets<fapi2::TARGET_TYPE_MEM_PORT>(i_target))
{
FAPI_TRY( mss::attr::set_freq(l_port, i_freq) );
}

fapi_try_exit:
return fapi2::current_err;
Expand Down Expand Up @@ -191,7 +194,7 @@ fapi_try_exit:
///
template<>
fapi2::ReturnCode callout_bad_freq_calculated<mss::proc_type::AXONE>(
const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
const uint64_t i_final_freq)
{
using TT = mss::frequency_traits<mss::proc_type::AXONE>;
Expand Down Expand Up @@ -265,8 +268,6 @@ fapi2::ReturnCode check_freq_support_vpd<mss::proc_type::AXONE>( const fapi2::Ta

FAPI_TRY(convert_ddr_freq_to_omi_freq(i_target, i_proposed_freq, l_omi_freq));
l_vpd_info.iv_omi_freq_mhz = l_omi_freq;
FAPI_INF("Setting VPD info OMI frequency: %d Gbps, for DDR frequency %d MT/s",
l_vpd_info.iv_omi_freq_mhz, i_proposed_freq);

// DDIMM SPD can contain different SI settings for each master rank.
// To determine which frequencies are supported, we have to check for each valid
Expand All @@ -287,12 +288,10 @@ fapi2::ReturnCode check_freq_support_vpd<mss::proc_type::AXONE>( const fapi2::Ta
}

l_vpd_info.iv_rank = l_rank.get_dimm_rank();
FAPI_INF("%s. VPD info - checking rank: %d",
mss::c_str(i_target), l_rank.get_dimm_rank());

// Check if this VPD configuration is supported
FAPI_TRY(is_vpd_config_supported<mss::proc_type::AXONE>(l_vpd_target, i_proposed_freq, l_vpd_info, o_supported),
"%s failed to determine if %u freq is supported", mss::c_str(i_target), i_proposed_freq);
"%s failed to determine if %u freq is supported on rank %d", mss::c_str(i_target), i_proposed_freq, l_vpd_info.iv_rank);

// If we fail any of the ranks, then this VPD configuration is not supported
if(o_supported == false)
Expand All @@ -307,29 +306,34 @@ fapi_try_exit:
}

///
/// @brief Update supported frequency scoreboard according to processor limits - specialization for Axone and MEM_PORT
/// @brief Update supported frequency scoreboard according to processor limits - specialization for Axone and PROC_CHIP
/// @param[in] i_target processor frequency domain
/// @param[in,out] io_scoreboard scoreboard of port targets supporting each frequency
/// @return FAPI2_RC_SUCCESS iff ok
///
template<>
fapi2::ReturnCode limit_freq_by_processor<mss::proc_type::AXONE>(
const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
freq_scoreboard& io_scoreboard)
{
std::vector<uint64_t> l_converted_omi_freqs;

// OCMB always needs to be in sync between OMI and DDR, by the given ratio
// so we convert the supported OMI freqs and remove every other DDR freq
// from the scoreboard
for (const auto l_omi_freq : AXONE_OMI_FREQS)
for (const auto& l_port : mss::find_targets<fapi2::TARGET_TYPE_MEM_PORT>(i_target))
{
uint64_t l_ddr_freq = 0;
FAPI_TRY(convert_omi_freq_to_ddr_freq(i_target, l_omi_freq, l_ddr_freq));
l_converted_omi_freqs.push_back(l_ddr_freq);
}
const auto l_port_pos = mss::relative_pos<fapi2::TARGET_TYPE_PROC_CHIP>(l_port);

FAPI_TRY(io_scoreboard.remove_freqs_not_on_list(0, l_converted_omi_freqs));
std::vector<uint64_t> l_converted_omi_freqs;

for (const auto l_omi_freq : AXONE_OMI_FREQS)
{
uint64_t l_ddr_freq = 0;
FAPI_TRY(convert_omi_freq_to_ddr_freq(l_port, l_omi_freq, l_ddr_freq));
l_converted_omi_freqs.push_back(l_ddr_freq);
}

FAPI_TRY(io_scoreboard.remove_freqs_not_on_list(l_port_pos, l_converted_omi_freqs));
}

fapi_try_exit:
return fapi2::current_err;
Expand All @@ -353,12 +357,12 @@ fapi2::ReturnCode num_master_ranks_per_dimm<mss::proc_type::AXONE>(
/// @brief Calls out the target if no DIMM frequencies are supported - specialization for Axone and MEM_PORT
/// @param[in] i_target target on which to operate
/// @param[in] i_supported_freq true if any FREQ's are supported
/// @param[in,out] i_num_ports number of configured ports (always 1 for Axone)
/// @param[in,out] i_num_ports number of configured ports
/// @return FAPI2_RC_SUCCESS iff ok
///
template<>
fapi2::ReturnCode callout_no_common_freq<mss::proc_type::AXONE>(
const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
const bool i_supported_freq,
const uint64_t i_num_ports)
{
Expand Down Expand Up @@ -387,7 +391,7 @@ fapi_try_exit:
///
template<>
fapi2::ReturnCode callout_max_freq_empty_set<mss::proc_type::AXONE>(
const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
const std::vector<std::vector<uint32_t>>& i_vpd_supported_freqs)
{

Expand All @@ -402,21 +406,26 @@ fapi2::ReturnCode callout_max_freq_empty_set<mss::proc_type::AXONE>(
uint32_t l_max_mrw_freqs[NUM_MAX_FREQS] = {0};
FAPI_TRY( mss::attr::get_max_allowed_dimm_freq(l_max_mrw_freqs) );

FAPI_ASSERT(false,
fapi2::P9A_MSS_MRW_FREQ_MAX_FREQ_EMPTY_SET()
.set_MSS_VPD_FREQ_0(l_port_vpd_max_freq[0])
.set_MSS_VPD_FREQ_1(l_port_vpd_max_freq[1])
.set_MSS_VPD_FREQ_2(l_port_vpd_max_freq[2])
.set_MSS_MAX_FREQ_0(l_max_mrw_freqs[0])
.set_MSS_MAX_FREQ_1(l_max_mrw_freqs[1])
.set_MSS_MAX_FREQ_2(l_max_mrw_freqs[2])
.set_MSS_MAX_FREQ_3(l_max_mrw_freqs[3])
.set_MSS_MAX_FREQ_4(l_max_mrw_freqs[4])
.set_OMI_FREQ_0(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_21_33GBPS)
.set_OMI_FREQ_1(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_23_46GBPS)
.set_OMI_FREQ_2(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_25_60GBPS)
.set_PORT_TARGET(i_target),
"%s didn't find a supported frequency for the port", mss::c_str(i_target));
for (const auto& l_port : mss::find_targets<fapi2::TARGET_TYPE_MEM_PORT>(i_target))
{
FAPI_ASSERT_NOEXIT(false,
fapi2::P9A_MSS_MRW_FREQ_MAX_FREQ_EMPTY_SET()
.set_MSS_VPD_FREQ_0(l_port_vpd_max_freq[0])
.set_MSS_VPD_FREQ_1(l_port_vpd_max_freq[1])
.set_MSS_VPD_FREQ_2(l_port_vpd_max_freq[2])
.set_MSS_MAX_FREQ_0(l_max_mrw_freqs[0])
.set_MSS_MAX_FREQ_1(l_max_mrw_freqs[1])
.set_MSS_MAX_FREQ_2(l_max_mrw_freqs[2])
.set_MSS_MAX_FREQ_3(l_max_mrw_freqs[3])
.set_MSS_MAX_FREQ_4(l_max_mrw_freqs[4])
.set_OMI_FREQ_0(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_21_33GBPS)
.set_OMI_FREQ_1(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_23_46GBPS)
.set_OMI_FREQ_2(fapi2::ENUM_ATTR_MSS_OCMB_EXP_BOOT_CONFIG_SERDES_FREQUENCY_SERDES_25_60GBPS)
.set_TARGET(l_port),
"%s didn't find a supported frequency for any ports in this domain", mss::c_str(l_port));
}

return fapi2::RC_P9A_MSS_MRW_FREQ_MAX_FREQ_EMPTY_SET;

fapi_try_exit:
return fapi2::current_err;
Expand All @@ -425,14 +434,14 @@ namespace check
{

///
/// @brief Checks the final frequency for the system type - Axone and MEM_PORT specialization
/// @brief Checks the final frequency for the system type - Axone and PROC_CHIP specialization
/// @param[in] i_target the target on which to operate
/// @return FAPI2_RC_SUCCESS iff okay
/// @note This function was needed in Nimbus to enforce a frequency limit due to a hardware limitation
/// and is not needed here.
///
template<>
fapi2::ReturnCode final_freq<mss::proc_type::AXONE>(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target)
fapi2::ReturnCode final_freq<mss::proc_type::AXONE>(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
{
return fapi2::FAPI2_RC_SUCCESS;
}
Expand Down
4 changes: 1 addition & 3 deletions src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.C
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2019 */
/* Contributors Listed Below - COPYRIGHT 2019,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -186,8 +186,6 @@ fapi2::ReturnCode select_omi_freq(const std::map< fapi2::Target<fapi2::TARGET_TY
const uint32_t i_omi_freq,
uint32_t& o_selected_omi_freq)
{
FAPI_INF("---- In select_omi_freq ----");

switch(i_equal_dimm_speed)
{
// If we resolved to equal speeds ...
Expand Down

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