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increase HBRT PNOR size
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Change-Id: Iaeb839c3f482904bc07118c5a862c2f59b0cad76
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68862
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
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@zane131
zane131 committed Nov 27, 2018
1 parent 4d54d9e commit 8535abf
Showing 1 changed file with 17 additions and 17 deletions.
34 changes: 17 additions & 17 deletions src/build/buildpnor/defaultPnorLayout.xml
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Original file line number Diff line number Diff line change
Expand Up @@ -168,18 +168,18 @@ Layout Description
<ecc/>
</section>
<section>
<description>Hostboot Runtime Services for Sapphire (6.0MB)</description>
<description>Hostboot Runtime Services for Sapphire (7.0MB)</description>
<eyeCatch>HBRT</eyeCatch>
<physicalOffset>0x128D000</physicalOffset>
<physicalRegionSize>0x600000</physicalRegionSize>
<physicalRegionSize>0x700000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>Payload (21.375MB)</description>
<eyeCatch>PAYLOAD</eyeCatch>
<physicalOffset>0x188D000</physicalOffset>
<physicalOffset>0x198D000</physicalOffset>
<physicalRegionSize>0x1560000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
Expand All @@ -188,7 +188,7 @@ Layout Description
<section>
<description>Special PNOR Test Space (36K)</description>
<eyeCatch>TEST</eyeCatch>
<physicalOffset>0x2DED000</physicalOffset>
<physicalOffset>0x2EED000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<testonly/>
<side>sideless</side>
Expand All @@ -199,7 +199,7 @@ Layout Description
from skipping header. Signing is forced in build pnor phase -->
<description>Special PNOR Test Space with Header (36K)</description>
<eyeCatch>TESTRO</eyeCatch>
<physicalOffset>0x2DF6000</physicalOffset>
<physicalOffset>0x2EF6000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<side>sideless</side>
<testonly/>
Expand All @@ -210,7 +210,7 @@ Layout Description
<section>
<description>Hostboot Bootloader (28K)</description>
<eyeCatch>HBBL</eyeCatch>
<physicalOffset>0x2DFF000</physicalOffset>
<physicalOffset>0x2EFF000</physicalOffset>
<!-- Physical Size includes Header rounded to ECC valid size -->
<!-- Max size of actual HBBL content is 20K and 22.5K with ECC -->
<physicalRegionSize>0x7000</physicalRegionSize>
Expand All @@ -221,31 +221,31 @@ Layout Description
<section>
<description>Global Data (36K)</description>
<eyeCatch>GLOBAL</eyeCatch>
<physicalOffset>0x2E06000</physicalOffset>
<physicalOffset>0x2F06000</physicalOffset>
<physicalRegionSize>0x9000</physicalRegionSize>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>Ref Image Ring Overrides (20K)</description>
<eyeCatch>RINGOVD</eyeCatch>
<physicalOffset>0x2E0F000</physicalOffset>
<physicalOffset>0x2F0F000</physicalOffset>
<physicalRegionSize>0x5000</physicalRegionSize>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>SecureBoot Key Transition Partition (16K)</description>
<eyeCatch>SBKT</eyeCatch>
<physicalOffset>0x2E14000</physicalOffset>
<physicalOffset>0x2F14000</physicalOffset>
<physicalRegionSize>0x4000</physicalRegionSize>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>OCC Lid (1.125M)</description>
<eyeCatch>OCC</eyeCatch>
<physicalOffset>0x2E18000</physicalOffset>
<physicalOffset>0x2F18000</physicalOffset>
<physicalRegionSize>0x120000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
Expand All @@ -256,7 +256,7 @@ Layout Description
<!-- We need 266KB per module sort, going to support
40 tables by default, plus ECC -->
<eyeCatch>WOFDATA</eyeCatch>
<physicalOffset>0x2F38000</physicalOffset>
<physicalOffset>0x3038000</physicalOffset>
<physicalRegionSize>0xC00000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
Expand All @@ -265,15 +265,15 @@ Layout Description
<section>
<description>FIRDATA (12K)</description>
<eyeCatch>FIRDATA</eyeCatch>
<physicalOffset>0x3B38000</physicalOffset>
<physicalOffset>0x3C38000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<side>sideless</side>
<ecc/>
</section>
<section>
<description>Memory Data (128K)</description>
<eyeCatch>MEMD</eyeCatch>
<physicalOffset>0x3B3B000</physicalOffset>
<physicalOffset>0x3C3B000</physicalOffset>
<physicalRegionSize>0x20000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
Expand All @@ -282,7 +282,7 @@ Layout Description
<section>
<description>Secureboot Test Load (12K)</description>
<eyeCatch>TESTLOAD</eyeCatch>
<physicalOffset>0x3B5B000</physicalOffset>
<physicalOffset>0x3C5B000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
Expand All @@ -291,7 +291,7 @@ Layout Description
<section>
<description>Centaur Hw Ref Image (12K)</description>
<eyeCatch>CENHWIMG</eyeCatch>
<physicalOffset>0x3B5E000</physicalOffset>
<physicalOffset>0x3C5E000</physicalOffset>
<physicalRegionSize>0x3000</physicalRegionSize>
<sha512Version/>
<side>sideless</side>
Expand All @@ -300,7 +300,7 @@ Layout Description
<section>
<description>Secure Boot (144K)</description>
<eyeCatch>SECBOOT</eyeCatch>
<physicalOffset>0x3B61000</physicalOffset>
<physicalOffset>0x3C61000</physicalOffset>
<physicalRegionSize>0x24000</physicalRegionSize>
<side>sideless</side>
<ecc/>
Expand All @@ -309,7 +309,7 @@ Layout Description
<section>
<description>Open CAPI Memory Buffer (OCMB) Firmware (300K)</description>
<eyeCatch>OCMBFW</eyeCatch>
<physicalOffset>0x3B85000</physicalOffset>
<physicalOffset>0x3C85000</physicalOffset>
<physicalRegionSize>0x4B000</physicalRegionSize>
<side>sideless</side>
<sha512Version/>
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