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Fixes MCBIST lab random addressing bug
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Change-Id: I580e8485bc5980139cf2052bbde748d99d7cb541
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88387
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88406
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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@sglancy6 @dcrowell77
sglancy6 authored and dcrowell77 committed Jan 3, 2020
1 parent e22bb40 commit 9431cc0
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Showing 5 changed files with 97 additions and 1 deletion.
43 changes: 43 additions & 0 deletions src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist.C
View file
Expand Up @@ -86,6 +86,49 @@ const std::vector< mss::mcbist::op_type > mcbistTraits<mss::mc_type::EXPLORER>::
mss::mcbist::op_type::READ_READ_WRITE ,
};

// These valus are pulled out of the MCBIST specification - page 41 10-DEC-19
// The index is the fixed width - the value is the LFSR_MASK value to be used
const std::vector< uint64_t > mcbistTraits<mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP>::LFSR_MASK_VALUES =
{
0x000000031,
0x00000001F,
0x001000000,
0x100000000,
0x004000003,
0x000080000,
0x040000018,
0x008000000,
0x010006000,
0x004000000,
0x001000000,
0x003200000,
0x001880000,
0x000200000,
0x000610000,
0x000100000,
0x000040000,
0x000010000,
0x000023000,
0x000002000,
0x000000400,
0x000002000,
0x000005008,
0x000002000,
0x000001088,
0x000000B00,
0x0000004A0,
0x000000100,
0x000000040,
0x000000010,
0x000000038,
0x000000008,
0x000000010,
0x000000004,
0x000000004,
0x000000002,
0x000000001,
};

namespace mcbist
{
///
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5 changes: 5 additions & 0 deletions src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mcbist/exp_mcbist_traits.H
View file
Expand Up @@ -244,6 +244,8 @@ class mcbistTraits< mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP>
static constexpr uint64_t MCBAMR1A0Q_REG = EXPLR_MCBIST_MCBAMR1A0Q;
static constexpr uint64_t MCBAMR2A0Q_REG = EXPLR_MCBIST_MCBAMR2A0Q;
static constexpr uint64_t MCBAMR3A0Q_REG = EXPLR_MCBIST_MCBAMR3A0Q;
static constexpr uint64_t LFSR_REG = EXPLR_MCBIST_MCBLFSRA0Q;
static const std::vector<uint64_t> LFSR_MASK_VALUES;

// All of the pattern registers are calculated off of this base
static constexpr uint64_t PATTERN0_REG = EXPLR_MCBIST_MCBFD0Q;
Expand Down Expand Up @@ -469,6 +471,9 @@ class mcbistTraits< mss::mc_type::EXPLORER, fapi2::TARGET_TYPE_OCMB_CHIP>
CFG_AMAP_COL2 = EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL2,
CFG_AMAP_COL2_LEN = EXPLR_MCBIST_MCBAMR3A0Q_CFG_AMAP_COL2_LEN,

LFSR_MASK = EXPLR_MCBIST_MCBLFSRA0Q_CFG_LFSR_MASK_A0,
LFSR_MASK_LEN = EXPLR_MCBIST_MCBLFSRA0Q_CFG_LFSR_MASK_A0_LEN,

CFG_DATA_ROT_SEED1 = EXPLR_MCBIST_MCBDRSRQ_CFG_DATA_ROT_SEED,
CFG_DATA_ROT_SEED1_LEN = EXPLR_MCBIST_MCBDRSRQ_CFG_DATA_ROT_SEED_LEN,
CFG_DATA_ROT = EXPLR_MCBIST_MCBDRCRQ_CFG_DATA_ROT,
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43 changes: 43 additions & 0 deletions src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C
View file
Expand Up @@ -82,6 +82,49 @@ const std::vector< mss::mcbist::op_type > mcbistTraits<>::FIFO_MODE_REQUIRED_OP_
mss::mcbist::op_type::READ_READ_WRITE ,
};

// These valus are pulled out of the MCBIST specification
// The index is the fixed width - the value is the LFSR_MASK value to be used
const std::vector< uint64_t > mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST>::LFSR_MASK_VALUES =
{
0x000000031,
0x00000001F,
0x001000000,
0x100000000,
0x004000003,
0x000080000,
0x040000018,
0x008000000,
0x010006000,
0x004000000,
0x001000000,
0x003200000,
0x001880000,
0x000200000,
0x000610000,
0x000100000,
0x000040000,
0x000010000,
0x000023000,
0x000002000,
0x000000400,
0x000002000,
0x000005008,
0x000002000,
0x000001088,
0x000000B00,
0x0000004A0,
0x000000100,
0x000000040,
0x000000010,
0x000000038,
0x000000008,
0x000000010,
0x000000004,
0x000000004,
0x000000002,
0x000000001,
};

namespace mcbist
{

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5 changes: 5 additions & 0 deletions src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H
View file
Expand Up @@ -243,6 +243,8 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST>
static constexpr uint64_t MCBAMR1A0Q_REG = MCBIST_MCBAMR1A0Q;
static constexpr uint64_t MCBAMR2A0Q_REG = MCBIST_MCBAMR2A0Q;
static constexpr uint64_t MCBAMR3A0Q_REG = MCBIST_MCBAMR3A0Q;
static constexpr uint64_t LFSR_REG = MCBIST_MCBLFSRA0Q;
static const std::vector<uint64_t> LFSR_MASK_VALUES;

// MCBIST FIR registers
static constexpr uint64_t MCBFIRMASK_REG = MCBIST_MCBISTFIRMASK;
Expand Down Expand Up @@ -468,6 +470,9 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST>
CFG_AMAP_COL2 = MCBIST_MCBAMR3A0Q_CFG_AMAP_COL2,
CFG_AMAP_COL2_LEN = MCBIST_MCBAMR3A0Q_CFG_AMAP_COL2_LEN,

LFSR_MASK = MCBIST_MCBLFSRA0Q_CFG_LFSR_MASK_A0,
LFSR_MASK_LEN = MCBIST_MCBLFSRA0Q_CFG_LFSR_MASK_A0_LEN,

CFG_DATA_ROT_SEED1 = MCBIST_MCBDRSRQ_CFG_DATA_ROT_SEED,
CFG_DATA_ROT_SEED1_LEN = MCBIST_MCBDRSRQ_CFG_DATA_ROT_SEED_LEN,
CFG_DATA_ROT = MCBIST_MCBDRCRQ_CFG_DATA_ROT,
Expand Down
2 changes: 1 addition & 1 deletion src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist.H
View file
Expand Up @@ -1975,7 +1975,7 @@ class program
/// @note Assumes data is right aligned
/// @return the fixed width address config
///
inline uint64_t get_fixed_width()
inline uint64_t get_fixed_width() const
{
uint64_t l_fixed_width = 0;
iv_addr_gen.extractToRight<TT::FIXED_WIDTH, TT::FIXED_WIDTH_LEN>(l_fixed_width);
Expand Down

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