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Adds insert function space helpers for LRDIMM
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Change-Id: I2ad35dc3d1a72606b7a0ce72ad407fe7ce10e0c2
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66086
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66097
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Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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@sglancy6 @crgeddes
sglancy6 authored and crgeddes committed Sep 27, 2018
1 parent 0fb82ef commit 99d8a2e
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93 changes: 49 additions & 44 deletions src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C
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Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,7 @@
#include <lib/dimm/ddr4/control_word_ddr4.H>
#include <lib/dimm/ddr4/data_buffer_ddr4.H>
#include <lib/mss_attribute_accessors.H>
#include <lib/workarounds/ccs_workarounds.H>

using fapi2::TARGET_TYPE_MCBIST;
using fapi2::TARGET_TYPE_MCA;
Expand Down Expand Up @@ -76,25 +77,6 @@ fapi2::ReturnCode bcw_load_ddr4( const fapi2::Target<TARGET_TYPE_DIMM>& i_target
FAPI_TRY( tdllk(i_target, l_tDLLK), "Failed to get tDLLK for %s in bcw_load_ddr4", mss::c_str(i_target) );

{
static const std::vector< cw_data > l_bcw_4bit_data =
{
// function space #, bcw #, attribute accessor, timing delay
{ FUNC_SPACE_0, DQ_RTT_NOM_CW, eff_dimm_ddr4_bc00, mss::tmrc() },
{ FUNC_SPACE_0, DQ_RTT_WR_CW, eff_dimm_ddr4_bc01, mss::tmrc() },
{ FUNC_SPACE_0, DQ_RTT_PARK_CW, eff_dimm_ddr4_bc02, mss::tmrc() },
{ FUNC_SPACE_0, DQ_DRIVER_CW, eff_dimm_ddr4_bc03, mss::tmrc() },
{ FUNC_SPACE_0, MDQ_RTT_CW, eff_dimm_ddr4_bc04, mss::tmrc() },
{ FUNC_SPACE_0, MDQ_DRIVER_CW, eff_dimm_ddr4_bc05, mss::tmrc() },
{ FUNC_SPACE_0, RANK_PRESENCE_CW, eff_dimm_ddr4_bc07, mss::tmrc() },
{ FUNC_SPACE_0, RANK_SELECTION_CW, eff_dimm_ddr4_bc08, mss::tmrc() },
{ FUNC_SPACE_0, POWER_SAVING_CW, eff_dimm_ddr4_bc09, mss::tmrc() },
{ FUNC_SPACE_0, OPERATING_SPEED, eff_dimm_ddr4_bc0a, l_tDLLK },
{ FUNC_SPACE_0, VOLT_AND_SLEW_RATE_CW, eff_dimm_ddr4_bc0b, mss::tmrc() },
{ FUNC_SPACE_0, BUFF_TRAIN_MODE_CW, eff_dimm_ddr4_bc0c, mss::tmrc() },
{ FUNC_SPACE_0, LDQ_OPERATION_CW, eff_dimm_ddr4_bc0d, mss::tmrc() },
{ FUNC_SPACE_0, PARITY_CW, eff_dimm_ddr4_bc0e, mss::tmrc() },
{ FUNC_SPACE_0, ERROR_STATUS_CW, eff_dimm_ddr4_bc0f, mss::tmrc() },
};

// This initialization may be vendor specific. We might need a different
// sequence for Montage vs. IDT for example.
Expand All @@ -104,33 +86,56 @@ fapi2::ReturnCode bcw_load_ddr4( const fapi2::Target<TARGET_TYPE_DIMM>& i_target
// IDT BCW init
//

// We set the 4-bit buffer control words first (they live in function space 0
// hw is supposed to default to function space 0 but Just.In.Case.
FAPI_TRY( ddr4::function_space_select<0>(i_target, io_inst), "Failed function space select 0", mss::c_str(i_target));
FAPI_TRY( control_word_engine<BCW_4BIT>(i_target, l_bcw_4bit_data, l_sim, io_inst) , "Failed control_word_engine",
mss::c_str(i_target));

// We set our 8-bit buffer control words but have to switch function space
// number for different control words. So it doesn't fit cleanly into a
// vector like the 4-bit buffer control words that are all in function space 0
// (feels like we should be initializing more control word....)
static const std::vector< cw_info > l_bcw_info =
{
cw_data l_data(FUNC_SPACE_6, BUFF_TRAIN_CONFIG_CW, eff_dimm_ddr4_f6bc4x, mss::tmrc());
FAPI_TRY( ddr4::function_space_select<6>(i_target, io_inst), "Failed function space select 6", mss::c_str(i_target) );
FAPI_TRY( control_word_engine<BCW_8BIT>(i_target, l_data, l_sim, io_inst), "Failed control_word_engine",
mss::c_str(i_target) );
}
// function space #, bcw #, attribute accessor, timing delay
// We set the 4-bit buffer control words first (they live in function space 0
// hw is supposed to default to function space 0 but Just.In.Case.
{ FUNC_SPACE_0, FUNC_SPACE_SELECT_CW, FUNC_SPACE_0, mss::tmrd() , CW8_DATA_LEN, cw_info::BCW},

// 4-bit BCW's from here
{ FUNC_SPACE_0, DQ_RTT_NOM_CW, eff_dimm_ddr4_bc00, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, DQ_RTT_WR_CW, eff_dimm_ddr4_bc01, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, DQ_RTT_PARK_CW, eff_dimm_ddr4_bc02, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, DQ_DRIVER_CW, eff_dimm_ddr4_bc03, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, MDQ_RTT_CW, eff_dimm_ddr4_bc04, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, MDQ_DRIVER_CW, eff_dimm_ddr4_bc05, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, RANK_PRESENCE_CW, eff_dimm_ddr4_bc07, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, RANK_SELECTION_CW, eff_dimm_ddr4_bc08, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, POWER_SAVING_CW, eff_dimm_ddr4_bc09, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, OPERATING_SPEED, eff_dimm_ddr4_bc0a, l_tDLLK , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, VOLT_AND_SLEW_RATE_CW, eff_dimm_ddr4_bc0b, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, BUFF_TRAIN_MODE_CW, eff_dimm_ddr4_bc0c, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, LDQ_OPERATION_CW, eff_dimm_ddr4_bc0d, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, PARITY_CW, eff_dimm_ddr4_bc0e, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_0, ERROR_STATUS_CW, eff_dimm_ddr4_bc0f, mss::tmrc() , CW4_DATA_LEN, cw_info::BCW},

// 8-bit BCW's now
// Function space 6
{ FUNC_SPACE_6, FUNC_SPACE_SELECT_CW, FUNC_SPACE_6, mss::tmrd(), CW8_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_6, BUFF_TRAIN_CONFIG_CW, eff_dimm_ddr4_f6bc4x, mss::tmrc(), CW8_DATA_LEN, cw_info::BCW},

// Function space 5
{ FUNC_SPACE_5, FUNC_SPACE_SELECT_CW, FUNC_SPACE_5, mss::tmrd(), CW8_DATA_LEN, cw_info::BCW},
{ FUNC_SPACE_5, BUFF_TRAIN_CONFIG_CW, eff_dimm_ddr4_f5bc6x, mss::tmrc(), CW8_DATA_LEN, cw_info::BCW},


// So, we always want to know what function space we're in
// The way to do that is to always return to one function space
// The LR spec recommends that we return to the default function space - function space 0
// If the vector is not at our default function space of function space 0, return to function space 0
{ FUNC_SPACE_0, FUNC_SPACE_SELECT_CW, FUNC_SPACE_0, mss::tmrd(), CW8_DATA_LEN, cw_info::BCW},
};

{
cw_data l_data(FUNC_SPACE_5, DRAM_VREF_CW, eff_dimm_ddr4_f5bc6x, mss::tmrc());
FAPI_TRY( ddr4::function_space_select<5>(i_target, io_inst), "Failed function space select 5", mss::c_str(i_target) );
FAPI_TRY( control_word_engine<BCW_8BIT>(i_target, l_data, l_sim, io_inst), "Failed control_word_engine",
mss::c_str(i_target) );
}

// Its recommended to always return to the function space
// "pointer" back to 0 so we always know where we are starting from
FAPI_TRY( ddr4::function_space_select<0>(i_target, io_inst), "Error in bcw_load_ddr4 for function space select 0" );
// DES first - make sure those CKE go high and stay there
io_inst.push_back(mss::ccs::des_command<TARGET_TYPE_MCBIST>());

// Issues the CW's
FAPI_TRY( control_word_engine(i_target, l_bcw_info, l_sim, io_inst),
"%s Failed control_word_engine", mss::c_str(i_target) );

// Now, hold the CKE's high, so we don't power down the RCD and re power it back up
mss::ccs::workarounds::hold_cke_high(io_inst);
}

fapi_try_exit:
Expand Down

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