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Change return size of the DDR4 DDIMM SPD
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Change-Id: If531b0ce88692f6900e414012c44de578acea2b7
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80826
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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@aamarin @dcrowell77
aamarin authored and dcrowell77 committed Aug 8, 2019
1 parent 4a6e203 commit 9fb424b
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Showing 4 changed files with 201 additions and 36 deletions.
3 changes: 3 additions & 0 deletions src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H
View file
Expand Up @@ -72,6 +72,7 @@ namespace fapi2
MOD_FAPI2_PLAT_GET_MC_PLL_BUCKET = 0x1D,
MOD_FAPI2_PLAT_GET_FREQ_MCA_MHZ = 0x1E,
MOD_GET_OMI_FREQ_AND_VCO = 0x1F,
MOD_FAPI2_SPD_ACCESS = 0x20,
};

/**
Expand Down Expand Up @@ -143,6 +144,8 @@ namespace fapi2
RC_NO_MATCHING_FREQ = HWPF_COMP_ID | 0x31,
RC_FREQ_LIST_NOT_FOUND = HWPF_COMP_ID | 0x32,
RC_PROC_FREQ_MISMATCH = HWPF_COMP_ID | 0x33,

RC_INVALID_SPD_DRAM_GEN = FAPI2_COMP_ID | 0x34,
};

/**
Expand Down
13 changes: 13 additions & 0 deletions src/include/usr/vpd/spdenums.H
View file
Expand Up @@ -45,6 +45,19 @@ enum
OCMB_SPD_EFD_COMBINED_SIZE = 0x800 // 2 KB
};

/**
* @brief Enumerations for common SPD values
*/
enum
{
MEM_DDR3 = 0xB,
MEM_DDR4 = 0xC,
DDR3_SPD_SIZE = 256,
DDR4_SPD_SIZE = 512,
DDIMM_DDR4_SPD_SIZE = 640,
MEM_DDIMM = 0xA
};

/**
* @brief Enumerations for fields that can be accessed in the SPD
*/
Expand Down
119 changes: 84 additions & 35 deletions src/usr/fapi2/plat_spd_access.C
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2016 */
/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -34,6 +34,8 @@
#include <errl/errlentry.H>
#include <errl/errlmanager.H>
#include <fapi2_spd_access.H>
#include <vpd/spdenums.H>
#include <hwas/common/hwasCallout.H>

namespace fapi2
{
Expand All @@ -49,14 +51,9 @@ fapi2::ReturnCode getSPD(
{
FAPI_DBG(ENTER_MRK "getSPD");

const uint8_t MEM_DDR3 = 0xB;
const uint8_t MEM_DDR4 = 0xC;
const uint32_t DDR3_KEYWORD_SIZE = 256;
const uint32_t DDR4_KEYWORD_SIZE = 512;

errlHndl_t l_errl = NULL;
errlHndl_t l_errl = nullptr;
fapi2::ReturnCode l_rc;
TARGETING::Target* l_pTarget = NULL;
TARGETING::Target* l_pTarget = nullptr;

do
{
Expand All @@ -65,49 +62,101 @@ fapi2::ReturnCode getSPD(
TARGETING::TYPE_DIMM);
if (l_errl)
{
FAPI_ERR("getSPD: Error from getTargetingTarget");
FAPI_ERR("getSPD: Error from getTargetingTarget for TYPE_DIMM");
break;
}

// If the caller passed a nullptr for blob then
// return size of the SPD
if ( o_blob == NULL )
if ( o_blob == nullptr )
{
// Get the DDR device type from SPD
uint8_t l_memType = 0x0;
size_t l_memSize = sizeof(l_memType);
// Get the DRAM generation from SPD
uint8_t l_memGen = 0x0;
size_t l_memSize = sizeof(l_memGen);

l_errl = deviceRead(l_pTarget,
(void *)&l_memType,
l_memSize,
DEVICE_SPD_ADDRESS(SPD::BASIC_MEMORY_TYPE));
static_cast<void *>(&l_memGen),
l_memSize,
DEVICE_SPD_ADDRESS(SPD::BASIC_MEMORY_TYPE));

if ( l_errl )
{
FAPI_ERR("getSPD: Error from deviceRead for BASIC_MEMORY_TYPE")
break;
}

if ( !l_errl )
switch(l_memGen)
{
if ( l_memType == MEM_DDR3 )
case SPD::MEM_DDR3:
o_size = SPD::DDR3_SPD_SIZE;
break;

case SPD::MEM_DDR4:
{
o_size = DDR3_KEYWORD_SIZE;
}
else if ( l_memType == MEM_DDR4 )
uint8_t l_memModule = 0x0;

l_errl = deviceRead(l_pTarget,
static_cast<void *>(&l_memModule),
l_memSize,
DEVICE_SPD_ADDRESS(SPD::MODULE_TYPE));

if( l_errl )
{
FAPI_ERR("getSPD: Error on deviceRead for MODULE_TYPE");
break;
}

if( l_memModule == SPD::MEM_DDIMM )
{
o_size = SPD::DDIMM_DDR4_SPD_SIZE;
}
else
{
o_size = SPD::DDR4_SPD_SIZE;
}
}// case MEM_DDR4
break;

default:
{
o_size = DDR4_KEYWORD_SIZE;
}
else
{
FAPI_ERR("getSPD: Invalid DIMM DDR Type");
break;
FAPI_ERR("getSPD: Unsupported DIMM DDR Generation");

/*@
* @errortype
* @moduleid MOD_FAPI2_SPD_ACCESS
* @reasoncode RC_INVALID_SPD_DRAM_GEN
* @userdata1 DDR generation
* @userdata2 HUID of input target
* @devdesc Bad SPD or unsupported DIMM
* @custdesc Unsupported DIMM generation
*/
l_errl = new ERRORLOG::ErrlEntry(
ERRORLOG::ERRL_SEV_UNRECOVERABLE,
MOD_FAPI2_SPD_ACCESS,
RC_INVALID_SPD_DRAM_GEN,
TARGETING::get_huid(l_pTarget),
l_memGen );

l_errl->addHwCallout( l_pTarget,
HWAS::SRCI_PRIORITY_HIGH,
HWAS::DELAYED_DECONFIG,
HWAS::GARD_NULL );
}
break;

FAPI_DBG("getSPD: Returning the size of the SPD :%d ", o_size);
}
}
}// switch

FAPI_DBG("getSPD: Returning the size of the SPD :%d ", o_size);

}// endif
else
{
// Return the entire SPD blob
l_errl = deviceRead(l_pTarget,
o_blob,
o_size,
DEVICE_SPD_ADDRESS(SPD::ENTIRE_SPD));
}
o_blob,
o_size,
DEVICE_SPD_ADDRESS(SPD::ENTIRE_SPD));
}// end else

break;

Expand All @@ -118,7 +167,7 @@ fapi2::ReturnCode getSPD(
FAPI_ERR("getSPD: Error getting SPD data for HUID=0x%.8X Size %d",
TARGETING::get_huid(l_pTarget),o_size);

l_rc.setPlatDataPtr(reinterpret_cast<void *> (l_errl));
l_rc.setPlatDataPtr(reinterpret_cast<void *>(l_errl));
}

FAPI_DBG("getSPD: SPD data for HUID=0x%.8X Size %d Blob %d",
Expand Down
102 changes: 101 additions & 1 deletion src/usr/fapi2/test/fapi2SpdTestCxx.H
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2016 */
/* Contributors Listed Below - COPYRIGHT 2016,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -37,6 +37,7 @@
#include <errl/errlentry.H>
#include <devicefw/driverif.H>
#include <fapi2_spd_access.H>
#include <vpd/spdenums.H>

using namespace TARGETING;

Expand Down Expand Up @@ -107,6 +108,105 @@ class SPDTest: public CxxTest::TestSuite
break;
}

uint8_t l_memModule = 0x0;
size_t l_memSize = sizeof(uint8_t);

auto l_errl = deviceRead(i_pTarget,
(void *)&l_memModule,
l_memSize,
DEVICE_SPD_ADDRESS(SPD::MODULE_TYPE));

if ( l_errl )
{
TS_FAIL( "testGetSPD- Failed to deviceRead with HUID= 0x%x",
TARGETING::get_huid(i_pTarget));
break;
}

uint8_t l_memGen = 0x0;
l_errl = deviceRead(i_pTarget,
(void *)&l_memGen,
l_memSize,
DEVICE_SPD_ADDRESS(SPD::BASIC_MEMORY_TYPE));

if ( l_errl )
{
TS_FAIL( "testGetSPD- Failed to deviceRead with HUID= 0x%x",
TARGETING::get_huid(i_pTarget));
break;
}

auto l_chipModel = i_pTarget->getAttr<TARGETING::ATTR_MODEL>();

if( l_chipModel == TARGETING::MODEL_AXONE )
{
// Assumes Axone is strictly DDR4, so not taking into
// account DDR3 or any other DRAM generation
if( l_memModule == SPD::MEM_DDIMM )
{
if ( l_size != SPD::DDIMM_DDR4_SPD_SIZE )
{
TS_FAIL( "testGetSPD- expected size %d != actual size %d with HUID= 0x%x",
SPD::DDIMM_DDR4_SPD_SIZE,
l_size,
TARGETING::get_huid(i_pTarget));
break;
}
}
else
{
if ( l_size != SPD::DDR4_SPD_SIZE )
{
TS_FAIL( "testGetSPD- expected size %d != actual size %d with HUID= 0x%x",
SPD::DDR4_SPD_SIZE,
l_size,
TARGETING::get_huid(i_pTarget));
break;
}
}
}
else if ( l_chipModel == TARGETING::MODEL_NIMBUS )
{
// Nimbus only suppported DDR4 and SPD size was
// DIMM BASE_MODULE_TYPE agnostic.
if ( l_size != SPD::DDR4_SPD_SIZE )
{
TS_FAIL( "testGetSPD- expected size %d != actual size %d with HUID= 0x%x",
SPD::DDR4_SPD_SIZE,
l_size,
TARGETING::get_huid(i_pTarget));
break;
}
}
else if( l_chipModel == TARGETING::MODEL_CUMULUS )
{
// BASE_MODULE_TYPE (RDIMM, LRDIMM, etc) isn't being
// taken into account because the SPD size isn't dependent
// on it for Cumulus.
if( l_memGen == SPD::MEM_DDR4 )
{
if ( l_size != SPD::DDR4_SPD_SIZE )
{
TS_FAIL( "testGetSPD- expected size %d != actual size %d with HUID= 0x%x",
SPD::DDR4_SPD_SIZE,
l_size,
TARGETING::get_huid(i_pTarget));
break;
}
}
else
{
if ( l_size != SPD::DDR3_SPD_SIZE )
{
TS_FAIL( "testGetSPD- expected size %d != actual size %d with HUID= 0x%x",
SPD::DDR3_SPD_SIZE,
l_size,
TARGETING::get_huid(i_pTarget));
break;
}
}
}

FAPI_DBG("getSPD: SPD data for DIMM with HUID=0x%.8X Size %d Blob %d",
TARGETING::get_huid(i_pTarget),
l_size,
Expand Down

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