Large update for security

- IMC6 changed to implement special nop
- IMC7 serializes bcctr for NDD2.2/CDD1.1
- mttrig2 moved to mttrig0
- mttrig2 now causes an L1 flush on NDD2.2/CDD1.1
- Force private L1D
- branch hint bits always honored
- enable new TM mode for NDD2.2

Change-Id: I625888ae8f1bf5dffba7d2b41ded8025b8622987
Original-Change-Id: I3b724f6d742b9ba321ea1abbfa6bbc7d5482b8ed
CQ: HW430733
CQ: SW410726
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50872
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55609
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>

src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml

@@ -57,6 +57,30 @@
     </chipEcFeature>
   </attribute>
   <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_HW430733</id>
+    <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+       Nimbus DD2.2 / Cumulus DD1.1 - Serialize bcctr[l]
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x22</value>
+          <test>EQUAL</test>
+        </ec>
+      </chip>
+      <chip>
+        <name>ENUM_ATTR_NAME_CUMULUS</name>
+        <ec>
+          <value>0x11</value>
+          <test>EQUAL</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ********************************************************************* -->
   <attribute>
     <id>ATTR_CHIP_EC_FEATURE_HW420171</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
@@ -143,10 +167,10 @@
   </attribute>
   <!-- ********************************************************************* -->
   <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_LEGACYTMMODE</id>
+    <id>ATTR_CHIP_EC_FEATURE_NEW_TM_MODE</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
-      Legacy TM mode - Will be replaced with full solution after bringup
+      Enable new TM handling for NDD2.2
     </description>
     <chipEcFeature>
       <chip>
@@ -217,7 +241,6 @@
       </chip>
     </chipEcFeature>
   </attribute>
-
   <!-- ********************************************************************* -->
   <attribute>
     <id>ATTR_CHIP_EC_FEATURE_P9_NO_NDL_IOVALID</id>