Updates WR VREF accessors to be generic

Change-Id: Ia954fff8f6e69fa92b1b8f9ab22902baf3e436cd Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/95127 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/95156 Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M Crowell <dcrowell@us.ibm.com>
open-power · Apr 24, 2020 · a9774d7 · a9774d7
1 parent 129a80a
commit a9774d7
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Showing 3 changed files with 20 additions and 13 deletions.
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
@@ -4519,10 +4519,7 @@ namespace wr_vref
 ///
 uint8_t get_range(const uint64_t i_value)
 {
-    // According to JEDEC range 1 uses a 0 and range 2 uses a 1
-    constexpr uint64_t RANGE1 = 0x00;
-    constexpr uint64_t RANGE2 = 0x01;
-    const uint8_t l_range = ((i_value >= WR_VREF_CROSSOVER_RANGE) ? RANGE1 : RANGE2);
+    const uint8_t l_range = ((i_value >= WR_VREF_CROSSOVER_RANGE) ? WR_VREF_RANGE1 : WR_VREF_RANGE2);
     return l_range;
 }
 

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2019                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2020                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -80,14 +80,6 @@ enum sizes
     WR_LVL_PRE_DLY = 0b101010,
     WR_LVL_NUM_VALID_SAMPLES = 0x5,
 
-    // WR VREF JEDEC values - we're using em in multiple places, so let's define them in one
-    // Single range max is the maximum range for a single WR VREF range in JEDEC - 0b110010
-    WR_VREF_SINGLE_RANGE_MAX = 0b110010,
-    // Crossover range is where the top of Range 2 (the lower range) equals the bottom of Range 1 (the upper range)
-    WR_VREF_CROSSOVER_RANGE  = 0b011000,
-    // Max range is computed from single range max (50) + the crossover range (24)
-    WR_VREF_MAX_COMPOSITE_RANGE = WR_VREF_SINGLE_RANGE_MAX + WR_VREF_CROSSOVER_RANGE,
-
     // Attribute? BRS
     COARSE_CAL_STEP_SIZE = 0x4,
     CONSEQ_PASS = 0x8,

diff --git a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H
@@ -326,6 +326,24 @@ enum ddr_dimm_speeds
     DDR5_MAX_SPEED = 4800,
 };
 
+///
+/// @brief DDR4 JEDEC constants
+///
+enum ddr4_consts
+{
+    // WR VREF JEDEC values - we're using em in multiple places, so let's define them in one
+    // Single range max is the maximum range for a single WR VREF range in JEDEC - 0b110010
+    WR_VREF_SINGLE_RANGE_MAX = 0b110010,
+    // Crossover range is where the top of Range 2 (the lower range) equals the bottom of Range 1 (the upper range)
+    WR_VREF_CROSSOVER_RANGE  = 0b011000,
+    // Max range is computed from single range max (50) + the crossover range (24)
+    WR_VREF_MAX_COMPOSITE_RANGE = WR_VREF_SINGLE_RANGE_MAX + WR_VREF_CROSSOVER_RANGE,
+
+    // Yes, Range 1 is 0 and Range 2 is 1
+    WR_VREF_RANGE1 = 0,
+    WR_VREF_RANGE2 = 1,
+};
+
 enum states
 {
     LOW = 0,