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Updates to run HW VREF cal by default
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This code runs the HW VREF calibrations (both WR and RD VREF)
by default if it is supported by the HW.  Four new attributes are
added to handle whether HW VREF cal should be run and with what overrides
it needs to be run.

Change-Id: Id2467101546ddb82cb19246b91748ab19a29a3a7
Original-Change-Id: I3ed63794e955ee8c94cffce0b98dba58886e4a9d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36803
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: RYAN P. KING <rpking@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55472
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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sglancy6 authored and dcrowell77 committed Mar 13, 2018
1 parent c526478 commit ad869ec
Showing 1 changed file with 34 additions and 0 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -2388,6 +2388,23 @@
</chipEcFeature>
</attribute>

<attribute>
<id>ATTR_CHIP_EC_FEATURE_MSS_CHECK_DISABLE_HW_VREF_CAL</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
In below DD2 Nimbus, the HW VREF calibration needs to be checked against the chip subversion to see if it can be run.
</description>
<chipEcFeature>
<chip>
<name>ENUM_ATTR_NAME_NIMBUS</name>
<ec>
<value>0x20</value>
<test>LESS_THAN</test>
</ec>
</chip>
</chipEcFeature>
</attribute>

<attribute>
<id>ATTR_CHIP_EC_FEATURE_MSS_ODT_CONFIG</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
Expand Down Expand Up @@ -2425,6 +2442,23 @@
</chipEcFeature>
</attribute>

<attribute>
<id>ATTR_CHIP_EC_FEATURE_MSS_CHECK_DIABLE_RD_VREF_CAL_VREFSENSE</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
In below DD2 Nimbus, the RD VREF cal VREF sense needs to be checked against the chip subversion to see if it should be run.
</description>
<chipEcFeature>
<chip>
<name>ENUM_ATTR_NAME_NIMBUS</name>
<ec>
<value>0x20</value>
<test>LESS_THAN</test>
</ec>
</chip>
</chipEcFeature>
</attribute>

<attribute>
<id>ATTR_CHIP_EC_FEATURE_RNG_ADAPTEST_SETTINGS</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
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