PM: Not mask OCC_HB_NOTIFY during PM Reset

Key_Cronus_Test=PM_REGRESS Change-Id: I64569389af70961fea3e4d77179394a3589e2c57 CQ: SW430959 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60989 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61409 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
open-power · Jun 28, 2018 · af797ec · af797ec
1 parent a218c42
commit af797ec
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diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_firinit.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_firinit.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -215,6 +215,8 @@ fapi2::ReturnCode pm_occ_fir_reset(
     FAPI_TRY(l_occFir.setAllRegBits(p9pmFIR::REG_FIRMASK),
              "ERROR: Faled to set the OCC FIR MASK");
 
+    FAPI_TRY(l_occFir.setRecvIntr(OCC_HB_NOTIFY));
+
     FAPI_TRY(l_occFir.put(),
              "ERROR:Failed to write to the OCC FIR MASK");
 

diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C
@@ -244,6 +244,19 @@ fapi2::ReturnCode p9_pm_reset(
     FAPI_TRY(l_rc, "ERROR: Failed to reset the PGPE");
     FAPI_TRY(p9_pm_glob_fir_trace(i_target, "After reset of PGPE"));
 
+    // Mask OCC HB bit in OCC fir mask register
+    {
+        const uint32_t l_OCC_HB_ERR_NOTIFY = 4;
+        p9pmFIR::PMFir <p9pmFIR::FIRTYPE_OCC_LFIR> l_occFir(i_target);
+        FAPI_TRY(l_occFir.get(p9pmFIR::REG_ALL),
+                 "ERROR: Failed to get the OCC FIR values");
+        FAPI_TRY(l_occFir.mask(l_OCC_HB_ERR_NOTIFY));
+        // Not doing the restoreSavedMask, as this is a special case between reset->init
+        // and pm init handles it
+        FAPI_TRY(l_occFir.put(),
+                 "ERROR: Failed to write OCC LFIR setting for STOP_RCV_NOTIFY_PRD");
+    }
+
     //  ************************************************************************
     //  Collect PGPE FFDC into FFDC section in HOMER
     //  ************************************************************************