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HWP-CORE/CACHE: Update Istep 4 procedures regressed on model 34
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Change-Id: I5dbc0aea36b2cdcc2cbb11ee39d346daca09fdaf
Original-Change-Id: Ia88b64463b0b911aa0882db20b85eda7a30571d6
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22225
Tested-by: Jenkins Server
Tested-by: PPE CI
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36091
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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davidduyue authored and dcrowell77 committed Feb 11, 2017
1 parent 3666b20 commit b0bc69a
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83 changes: 55 additions & 28 deletions src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.C
View file
Expand Up @@ -26,25 +26,47 @@
/// @file p9_common_poweronoff.C
/// @brief common procedure for power on/off
///
/// Procedure Summary:
///

// *HWP HWP Owner : David Du <daviddu@us.ibm.com>
// *HWP Backup HWP Owner : Greg Still <stillgs@us.ibm.com>
// *HWP FW Owner : Sangeetha T S <sangeet2@in.ibm.com>
// *HWP Team : PM
// *HWP Consumed by : SBE:SGPE:CME
// *HWP Level : 2
//
// Procedure Summary:
//

//------------------------------------------------------------------------------
// Includes
//------------------------------------------------------------------------------
#include <fapi2.H>
#include "p9_common_poweronoff.H"
#include "p9_quad_scom_addresses.H"

//------------------------------------------------------------------------------
// Constant Definitions:
//------------------------------------------------------------------------------
// Define only address offset to be compatible with both core and cache domain

const uint64_t PPM_PFCS[2] = { C_PPM_PFCS_SCOM,
EQ_PPM_PFCS_SCOM
};

const uint64_t PPM_PFCS_CLR[2] = { C_PPM_PFCS_SCOM1,
EQ_PPM_PFCS_SCOM1
};

const uint64_t PPM_PFCS_OR[2] = { C_PPM_PFCS_SCOM2,
EQ_PPM_PFCS_SCOM2
};

const uint64_t PPM_PFDLY[2] = { C_PPM_PFDLY,
EQ_PPM_PFDLY
};

const uint64_t PPM_PFSNS[2] = { C_PPM_PFSNS,
EQ_PPM_PFSNS
};

enum { CYCLES_PER_MS = 500000,
INST_PER_LOOP = 8,
PFET_STATE_LENGTH = 2,
Expand Down Expand Up @@ -110,16 +132,21 @@ enum { POWDN_DLY_LENGTH = 4,
//------------------------------------------------------------------------------
// Procedure:
//------------------------------------------------------------------------------

template <fapi2::TargetType K>
fapi2::ReturnCode
p9_common_poweronoff(
const fapi2::Target < fapi2::TARGET_TYPE_EQ |
fapi2::TARGET_TYPE_CORE > & i_target,
const fapi2::Target<K>& i_target,
const p9power::powerOperation_t i_operation)
{
uint32_t l_loopsPerMs;

FAPI_INF(">>p9_common_poweronoff: %d", i_operation);
uint32_t l_type = 0; // Assumes core

if((i_target.getType() & fapi2::TARGET_TYPE_EQ))
{
l_type = 1;
}

fapi2::buffer<uint64_t> l_data;
fapi2::buffer<uint64_t> l_temp; // extractToRight seems the require space to write into.
Expand All @@ -136,15 +163,15 @@ p9_common_poweronoff(
// Note that the Lamda assumes that l_data already contains the
do
{
FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS, l_data),
FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS[l_type], l_data),
"getScom failed for address PPM_PFCS"); // poll
}
while ((l_data.getBit < VDD_PG_STATE_BIT + PG_STATE_IDLE_OFFSET > ()
!= 0 ) && (--l_loopsPerMs != 0));

FAPI_ASSERT((l_loopsPerMs != 0),
fapi2::PMPROC_PFETLIB_TIMEOUT()
.set_ADDRESS(PPM_PFCS),
.set_ADDRESS(PPM_PFCS[l_type]),
"VDD FSM idle timeout");

/// (Optional) Check PFETCNTLSTAT_REG[VDD_PG_SEL]being 0x8
Expand All @@ -169,7 +196,7 @@ p9_common_poweronoff(

do
{
FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS, l_data),
FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS[l_type], l_data),
"getScom failed for address PPM_PFCS"); // poll
FAPI_DBG("timeout l_loopsPerMs. %x", l_loopsPerMs);
}
Expand All @@ -178,7 +205,7 @@ p9_common_poweronoff(

FAPI_ASSERT((l_loopsPerMs != 0),
fapi2::PMPROC_PFETLIB_TIMEOUT()
.set_ADDRESS(PPM_PFCS),
.set_ADDRESS(PPM_PFCS[l_type]),
"VCS FSM idle timeout");

// (Optional) Check PFETCNTLSTAT_REG[VDD_PG_SEL]
Expand Down Expand Up @@ -212,13 +239,13 @@ p9_common_poweronoff(
setBit<VDD_PFET_VAL_OVERRIDE_BIT>().
setBit<VDD_PFET_SEL_OVERRIDE_BIT>().
setBit<VDD_PFET_REGULATION_FINGER_EN_BIT>();
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR[l_type], l_data),
"putScom failed for address PPM_PFCS");

FAPI_DBG("Force VDD on");
l_data.flush<0>().insertFromRight
<VDD_PFET_FORCE_STATE_BIT, PFET_STATE_LENGTH>(PFET_FORCE_VON);
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_OR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_OR[l_type], l_data),
"putScom failed for address PPM_PFCS_OR");

// Check for valid power on completion
Expand All @@ -233,7 +260,7 @@ p9_common_poweronoff(
FAPI_DBG("vdd_pfet_force_state = 00, or Idle");
l_data.flush<0>().insertFromRight
<VDD_PFET_FORCE_STATE_BIT, PFET_STATE_LENGTH>(~PFET_NOP);
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR[l_type], l_data),
"putScom failed for address PPM_PFCS_CLR");

fapi_try_exit:
Expand All @@ -254,13 +281,13 @@ p9_common_poweronoff(
l_data.flush<0>().
setBit<VCS_PFET_VAL_OVERRIDE_BIT>().
setBit<VCS_PFET_SEL_OVERRIDE_BIT>();
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR[l_type], l_data),
"putScom failed for address PPM_PFCS_CLR");

FAPI_DBG("Force VSS on");
l_data.flush<0>().insertFromRight
<VCS_PFET_FORCE_STATE_BIT, PFET_STATE_LENGTH>(PFET_FORCE_VON);
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_OR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_OR[l_type], l_data),
"putScom failed for address PPM_PFCS_OR");

// Check for valid power on completion
Expand All @@ -274,7 +301,7 @@ p9_common_poweronoff(
FAPI_DBG("vss_pfet_force_state = 00, or Idle");
l_data.flush<0>().insertFromRight
<VCS_PFET_FORCE_STATE_BIT, PFET_STATE_LENGTH>(~PFET_NOP);
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR[l_type], l_data),
"putScom failed for address PPM_PFCS_CLR");

fapi_try_exit:
Expand All @@ -295,13 +322,13 @@ p9_common_poweronoff(
setBit<VDD_PFET_VAL_OVERRIDE_BIT>().
setBit<VDD_PFET_SEL_OVERRIDE_BIT>().
setBit<VDD_PFET_REGULATION_FINGER_EN_BIT>();
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR[l_type], l_data),
"putScom failed for address PPM_PFCS");

FAPI_DBG("Force VDD off");
l_data.flush<0>().insertFromRight
<VDD_PFET_FORCE_STATE_BIT, PFET_STATE_LENGTH>(PFET_FORCE_VOFF);
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_OR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_OR[l_type], l_data),
"putScom failed for address PPM_PFCS");

// Check for valid power off completion
Expand All @@ -315,7 +342,7 @@ p9_common_poweronoff(
FAPI_DBG("vdd_pfet_force_state = 00, or Idle");
l_data.flush<0>().insertFromRight
<VDD_PFET_FORCE_STATE_BIT, PFET_STATE_LENGTH>(~PFET_NOP);
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR[l_type], l_data),
"putScom failed for address PPM_PFCS_CLR");

fapi_try_exit:
Expand All @@ -335,14 +362,14 @@ p9_common_poweronoff(
l_data.flush<0>().
setBit<VCS_PFET_VAL_OVERRIDE_BIT>().
setBit<VCS_PFET_SEL_OVERRIDE_BIT>();
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR[l_type], l_data),
"putScom failed for address PPM_PFCS_CLR");

FAPI_DBG("Force VSS off");
l_data.flush<0>().
insertFromRight
<VCS_PFET_FORCE_STATE_BIT, PFET_STATE_LENGTH>(PFET_FORCE_VOFF);
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_OR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_OR[l_type], l_data),
"putScom failed for address PPM_PFCS_OR");

// Check for valid power off completion
Expand All @@ -356,7 +383,7 @@ p9_common_poweronoff(
FAPI_DBG("vcs_pfet_force_state = 00, or Idle");
l_data.flush<0>().insertFromRight
<VCS_PFET_FORCE_STATE_BIT, PFET_STATE_LENGTH>(~PFET_NOP);
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR[l_type], l_data),
"putScom failed for address PPM_PFCS_CLR");

fapi_try_exit:
Expand Down Expand Up @@ -390,18 +417,18 @@ p9_common_poweronoff(
l_data.flush<0>().
setBit<VCS_PFET_VAL_OVERRIDE_BIT>().
setBit<VCS_PFET_SEL_OVERRIDE_BIT>();
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR, l_data),
FAPI_TRY(fapi2::putScom(i_target, PPM_PFCS_CLR[l_type], l_data),
"putScom failed for address PPM_PFCS_CLR");

FAPI_DBG("Make sure that we are not forcing PFET for VCS or VDD off");
FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS, l_data),
FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS[l_type], l_data),
"getScom failed for address PPM_PFCS");
l_data.extractToRight
<VDD_PFET_FORCE_STATE_BIT, 2 * PFET_STATE_LENGTH>
(l_temp);
FAPI_ASSERT((l_temp == 0),
fapi2::PMPROC_PFETLIB_BAD_SCOM()
.set_ADDRESS(PPM_PFCS),
.set_ADDRESS(PPM_PFCS[l_type]),
"PFET_FORCE_STATE not 0");

// 2) Set bits to program HW to enable VDD PFET, and
Expand All @@ -427,15 +454,15 @@ p9_common_poweronoff(
// 4.3.8.2 Power-off via Hardware FSM
// 1) Read PFETCNTLSTAT_REG: check for bits 0:3 being 0b0000
FAPI_DBG("Make sure that we are not forcing PFET for VCS or VDD off");
FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS, l_data),
FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS[l_type], l_data),
"getScom failed for address PPM_PFCS");

l_data.extractToRight
<VDD_PFET_FORCE_STATE_BIT, 2 * PFET_STATE_LENGTH>
(l_temp);
FAPI_ASSERT((l_temp == 0),
fapi2::PMPROC_PFETLIB_BAD_SCOM()
.set_ADDRESS(PPM_PFCS),
.set_ADDRESS(PPM_PFCS[l_type]),
"PFET_FORCE_STATE not 0");

// 2) Set bits to program HW to turn off VDD PFET, and
Expand Down
39 changes: 15 additions & 24 deletions src/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.H
View file
Expand Up @@ -26,17 +26,19 @@
/// @file p9_common_poweronoff.H
/// @brief common procedure for power on/off
///
/// *HWP HWP Owner : David Du <daviddu@us.ibm.com>
/// *HWP Backup HWP Owner : Greg Still <stillgs@us.ibm.com>
/// *HWP FW Owner : Sangeetha T S <sangeet2@in.ibm.com>
/// *HWP Team : PM
/// *HWP Consumed by : SBE:SGPE:CME
/// *HWP Level : 2
///

// *HWP HWP Owner : David Du <daviddu@us.ibm.com>
// *HWP Backup HWP Owner : Greg Still <stillgs@us.ibm.com>
// *HWP FW Owner : Sangeetha T S <sangeet2@in.ibm.com>
// *HWP Team : PM
// *HWP Consumed by : SBE:SGPE:CME
// *HWP Level : 2

#ifndef __P9_COMMON_POWERONOFF_H__
#define __P9_COMMON_POWERONOFF_H__

#include <fapi2.H>

namespace p9power
{
enum powerOperation_t
Expand All @@ -48,23 +50,14 @@ enum powerOperation_t
};
}

// Define only address offset to be compatible with both core and cache domain
#define PPM_PFCS 0x000f0118
#define PPM_PFCS_CLR 0x000f0119
#define PPM_PFCS_OR 0x000f011a
#define PPM_PFDLY 0x000f011b
#define PPM_PFSNS 0x000f011c
#define PPM_PFOFF 0x000f011d

/// @typedef p9_common_poweronoff_FP_t
/// function pointer typedef definition for HWP call support
/// @todo: consider template solution here
typedef fapi2::ReturnCode (*p9_common_poweronoff_FP_t) (
const fapi2::Target < fapi2::TARGET_TYPE_EQ |
fapi2::TARGET_TYPE_CORE > &,
const p9power::powerOperation_t i_operation);

extern "C"
{
/// @brief common procedure for power on/off
///
/// @param [in] i_target TARGET_TYPE_EQ|TARGET_TYPE_CORE target
Expand All @@ -74,12 +67,10 @@ extern "C"
/// @attritem ATTR_PFET_TIMING - EX target, uint32
///
/// @retval FAPI_RC_SUCCESS
fapi2::ReturnCode
p9_common_poweronoff(
const fapi2::Target < fapi2::TARGET_TYPE_EQ |
fapi2::TARGET_TYPE_CORE > & i_target,
const p9power::powerOperation_t i_operation);

} // extern C
template <fapi2::TargetType K>
fapi2::ReturnCode
p9_common_poweronoff(
const fapi2::Target<K>& i_target,
const p9power::powerOperation_t i_operation);

#endif // __P9_COMMON_POWERONOFF_H__

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