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FFDC Updates
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Change-Id: Icd0ab17204d89611d9b1c7d814c922724a6be836
Original-Change-Id: I75faf871652e5320889961516b203ad5356c7843
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29885
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Deepak Kodihalli <dkodihal@in.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42948
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Tested-by: Dean Sanner <dsanner@us.ibm.com>
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anusrang authored and sannerd committed Jul 11, 2017
1 parent a0e56bf commit b279034
Showing 1 changed file with 148 additions and 14 deletions.
162 changes: 148 additions & 14 deletions src/import/chips/p9/procedures/xml/error_info/p9_perv_sbe_cmn_errors.xml
Original file line number Diff line number Diff line change
Expand Up @@ -29,29 +29,163 @@
<hwpErrors>
<!-- ******************************************************************** -->
<hwpError>
<sbeError/>
<rc>RC_SBE_SCAN0_DONE_POLL_THRESHOLD_ERR</rc>
<description>Timeout waiting for scan0 to complete , loop count expired that polls for OPCG_DONE</description>
<sbeError/>
<rc>RC_SBE_SCAN0_DONE_POLL_THRESHOLD_ERR</rc>
<description>Timeout waiting for scan0 to complete , loop count expired that polls for OPCG_DONE</description>
<ffdc>TARGET_CHIPLET</ffdc>
<collectRegisterFfdc>
<id>NET_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CPLT_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>OPCG_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CC_STATUS_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>ERROR_STATUS_OF_CC</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CC_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<ffdc>PERV_CPLT_STAT0</ffdc>
<ffdc>LOOP_COUNT</ffdc>
<ffdc>HW_DELAY</ffdc>
</hwpError>
<!-- ******************************************************************** -->
<hwpError>
<sbeError/>
<rc>RC_SBE_ARRAYINIT_POLL_THRESHOLD_ERR</rc>
<description>Polling for OPCG_DONE for arrayInit reached threshold , count expired.</description>
<sbeError/>
<rc>RC_SBE_ARRAYINIT_POLL_THRESHOLD_ERR</rc>
<description>Polling for OPCG_DONE for arrayInit reached threshold , count expired.</description>
<ffdc>TARGET_CHIPLET</ffdc>
<collectRegisterFfdc>
<id>NET_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CPLT_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>OPCG_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CC_STATUS_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>ERROR_STATUS_OF_CC</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CC_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<ffdc>PERV_CPLT_STAT0</ffdc>
<ffdc>LOOP_COUNT</ffdc>
<ffdc>HW_DELAY</ffdc>
</hwpError>
<!-- ******************************************************************** -->
<hwpError>
<sbeError/>
<rc>RC_SRAM_ABIST_DONE_BIT_ERR</rc>
<description>SRAM abist done bit is not set</description>
<ffdc>READ_ABIST_DONE</ffdc>
<sbeError/>
<rc>RC_SRAM_ABIST_DONE_BIT_ERR</rc>
<description>SRAM abist done bit is not set</description>
<ffdc>TARGET_CHIPLET</ffdc>
<collectRegisterFfdc>
<id>NET_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CPLT_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>OPCG_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CC_STATUS_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>ERROR_STATUS_OF_CC</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CC_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<ffdc>PERV_CPLT_STAT</ffdc>
<ffdc>SELECT_SRAM</ffdc>
<ffdc>READ_ABIST_DONE</ffdc>
</hwpError>
<!-- ******************************************************************** -->
<hwpError>
<sbeError/>
<rc>RC_EDRAM_ABIST_DONE_BIT_ERR</rc>
<description>EDRAM abist done bit is not set</description>
<ffdc>READ_ABIST_DONE</ffdc>
<sbeError/>
<rc>RC_EDRAM_ABIST_DONE_BIT_ERR</rc>
<description>EDRAM abist done bit is not set</description>
<ffdc>TARGET_CHIPLET</ffdc>
<collectRegisterFfdc>
<id>NET_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CPLT_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>OPCG_CTRL_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CC_STATUS_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>ERROR_STATUS_OF_CC</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CC_REGISTERS</id>
<target>TARGET_CHIPLET</target>
<targetType>TARGET_TYPE_PERV</targetType>
</collectRegisterFfdc>
<ffdc>PERV_CPLT_STAT</ffdc>
<ffdc>SELECT_EDRAM</ffdc>
<ffdc>READ_ABIST_DONE</ffdc>
</hwpError>
<!-- ******************************************************************** -->
</hwpErrors>

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