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Account for Explorer's DMB_REVISION format in its SPD
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We have been told that the field we are reading to figure out the
EC level of the OCMB via its SPD (offset 0x200) is going to say
0xA0 for the first version of the card, at IBM we would call this
EC 0x10. The Explorer manufacture has stated that they will increment
the 1st nibble when they do match card revisions, and the 2nd nibble
on minor revisions. This commit adds the logic to convert the
manufacture's revision format into IBM's EC level format. It also
updates the prebuilt cache we use in simics for axone to have the
expected 0xA0 value for the explorer SPD stored in the prebuilt cache

Change-Id: I10e9523a8fbea847e3124c256fab7bee850cb29d
RTC: 214627
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82873
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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crgeddes authored and dcrowell77 committed Sep 11, 2019
1 parent 8e9808d commit bafe5de
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Showing 4 changed files with 149 additions and 204 deletions.
2 changes: 1 addition & 1 deletion src/build/citest/etc/eecache_prebuilt
@@ -1 +1 @@
/gsa/ausgsa/projects/h/hostboot/eecache_prebuilt/06_19_19_eecache_prebuilt.bin.ecc
/gsa/ausgsa/projects/h/hostboot/eecache_prebuilt/09_06_19_eecache_prebuilt.bin.ecc
4 changes: 3 additions & 1 deletion src/build/citest/etc/workarounds.postsimsetup
Expand Up @@ -39,5 +39,7 @@ mkdir -p $sb/simu/configs/
grep -v PROC_EC $BACKING_BUILD/src/simu/configs/P9_NIMBUS.config > $sb/simu/configs/P9_NIMBUS.config
echo "SETENV PROC_EC 22" >> $sb/simu/configs/P9_NIMBUS.config


# TODO 215621 remove when simics gets dimmspd.dat updated
mkdir -p $sb/../simics/import/vpd/
cp /gsa/ausgsa/projects/h/hostboot/.binary_cache/data/09e225d24bd942a0011ca520311d7cbf289e672e $sb/../simics/import/vpd/dimmspd.dat
##########################################################################
5 changes: 3 additions & 2 deletions src/build/simics/standalone.simics
Expand Up @@ -121,8 +121,9 @@ if ($hb_mode == 1) {
if ($hb_mode == 0) { #Only do this on Axone and later models that have Explorer chip

# IDEC register consumed by Hostboot
# UCHIP(0x2134)=0x100600D2
set-class-attr ocmb mscc_regs_xcbi_chip_info 0x100600D2
# UCHIP(0x2134)=0x110600D2
# TODO RTC: 215621 Remove workarounds after simics gets updated
set-class-attr ocmb mscc_regs_xcbi_chip_info 0x110600D2

# Loop over all explorer chips
foreach $obj in (get-object-list ocmb -all){
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