Creates LRDIMM mrep/dwl calibration recorder class

Change-Id: Ic3f1c1d3ee4e19a3c6b33b3472e4a513985321a5 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69489 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69495 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
open-power · Dec 13, 2018 · bd720a4 · bd720a4
1 parent c517b8a
commit bd720a4
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diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
@@ -208,6 +208,10 @@ enum ffdc_function_codes
     // LR helper functions
     FINE_RECORDER_ADD_RESULTS = 119,
     FINE_RECORDER_FIND_EYE = 120,
+
+    // LR training function
+    DWL_CALL_OUT = 130,
+    MREP_CALL_OUT = 131,
 };
 
 enum states

diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lrdimm.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lrdimm.xml
@@ -114,4 +114,15 @@
     <ffdc>RANK</ffdc>
   </hwpError>
 
+    <hwpError>
+    <rc>RC_MSS_LRDIMM_CAL_NOISE</rc>
+    <description>
+      Set if training result show too much noise during a calibration step
+    </description>
+    <ffdc>NIBBLE</ffdc>
+    <ffdc>BUFFER</ffdc>
+    <ffdc>CALIBRATION_RAW_DATA</ffdc>
+    <ffdc>CALIBRATION_STEP</ffdc>
+    <ffdc>TARGET</ffdc>
+  </hwpError>
 </hwpErrors>
diff --git a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H
@@ -244,6 +244,17 @@ enum guard_band : uint16_t
 
 }// spd
 
+///
+/// @brief DIMM nibble mask
+/// @note nibble0: 4 high bits, nibble1: 4 low bits
+///
+enum nibble_mask
+{
+    MASK_NIBBLE0 = 0xf0,
+    MASK_NIBBLE1 = 0x0f,
+};
+
+
 }// mss
 
 #endif