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Edit ECID+Perv code to use new gen'd centaur scom headers
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RTC 163585 - Done

Change-Id: I36c3476d07594382e70772eab050702c80992807
Original-Change-Id: I4fe900e3c1e919ff03158dd4cd02c268667dcbec
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34371
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Peng Fei Gou <shgoupf@cn.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44950
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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Luke Mulkey authored and crgeddes committed Aug 31, 2017
1 parent d459810 commit be4329c
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33 changes: 33 additions & 0 deletions src/import/chips/centaur/common/include/cen_gen_scom_addresses_fixes.H
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Expand Up @@ -25,4 +25,37 @@

//Example: To fix an existing definiton
//CEN_FIXREG32 (CEN_MBA_1_CCS_INST_ARR0_10, RULL(0x01234567));
#include <p9_const_common.H>
#include <p9_scom_template_consts.H>
#ifndef CEN_GEN_SCOM_ADDRESSES_FIXES_H
#define CEN_GEN_SCOM_ADDRESSES_FIXES_H

REG64( CEN_WRITE_ALL_FUNC_GP3 , RULL(0x6B0F0012), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_WRITE_ALL_FUNC_GP3_AND , RULL(0x6B0F0013), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_WRITE_ALL_FUNC_GP3_OR , RULL(0x6B0F0014), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_WRITE_ALL_PCB_SLAVE_ERRREG , RULL(0x6B0F001F), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_PERV_LOCAL_FIR , RULL(0x0004000A), SH_UNT_PERV , SH_ACS_SCOM_RW );
REG64( CEN_PERV_TP_LOCAL_FIR , RULL(0x0104000A), SH_UNT_PERV_1 , SH_ACS_SCOM_RW );
REG64( CEN_PERV_LOCAL_FIR_AND , RULL(0x0004000B), SH_UNT_PERV , SH_ACS_SCOM1_AND );
REG64( CEN_PERV_TP_LOCAL_FIR_AND , RULL(0x0104000B), SH_UNT_PERV_1 , SH_ACS_SCOM1_AND );
REG64( CEN_PERV_LOCAL_FIR_OR , RULL(0x0004000C), SH_UNT_PERV , SH_ACS_SCOM2_OR );
REG64( CEN_PERV_TP_LOCAL_FIR_OR , RULL(0x0104000C), SH_UNT_PERV_1 , SH_ACS_SCOM2_OR );
REG64( CEN_PERV_LOCAL_FIR_MASK , RULL(0x0004000D), SH_UNT_PERV , SH_ACS_SCOM_RW );
REG64( CEN_PERV_TP_LOCAL_FIR_MASK , RULL(0x0104000D), SH_UNT_PERV_1 , SH_ACS_SCOM_RW );
REG64( CEN_PERV_LOCAL_FIR_MASK_AND , RULL(0x0004000E), SH_UNT_PERV , SH_ACS_SCOM1_AND );
REG64( CEN_PERV_TP_LOCAL_FIR_MASK_AND , RULL(0x0104000E), SH_UNT_PERV_1 , SH_ACS_SCOM1_AND );
REG64( CEN_PERV_LOCAL_FIR_MASK_OR , RULL(0x0004000F), SH_UNT_PERV , SH_ACS_SCOM2_OR );
REG64( CEN_PERV_TP_LOCAL_FIR_MASK_OR , RULL(0x0104000F), SH_UNT_PERV_1 , SH_ACS_SCOM2_OR );
REG64( CEN_GENERIC_GP1 , RULL(0x00000001), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_GENERIC_GP0_AND , RULL(0x00000004), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_GENERIC_GP0_OR , RULL(0x00000005), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_GENERIC_GP3_AND , RULL(0x000F0013), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_GENERIC_GP3_OR , RULL(0x000F0014), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_GENERIC_OPCG_CNTL0 , RULL(0x00030002), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_GENERIC_OPCG_CNTL2 , RULL(0x00030004), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_GENERIC_CLK_REGION , RULL(0x00030006), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_GENERIC_CLK_SCANSEL , RULL(0x00030007), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_GENERIC_CLK_STATUS , RULL(0x00030008), SH_UNT_PERV, SH_ACS_FSI );
REG64( CEN_GENERIC_CLK_SCANDATA0 , RULL(0x00038000), SH_UNT_PERV, SH_ACS_FSI );

#endif

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