Clear Spare Lane on MC instead of DMI

- Erepair Path Only
- Bus Level Scoms are MC Target

Change-Id: I4520208f5a9d85c2a7fdb100ac8fef6b65e9a782
CQ: SW442687
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64740
Reviewed-by: Megan P. Nguyen <pmegan@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64747
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

src/import/chips/p9/procedures/hwp/io/p9_io_dmi_linktrain.C

@@ -841,7 +841,9 @@ fapi2::ReturnCode check_dmi_proc_bad_lane_data(
                          (8 * (l_chipunitnum + 1) + 1) );
                 FAPI_TRY(l_data.clearBit(8 * (l_chipunitnum + 1) + 1));
 
-                FAPI_TRY(putScom(i_tgt, DMI_FIR_REG_AND, l_data));
+                fapi2::Target<fapi2::TARGET_TYPE_MC> l_mc_tgt =
+                    i_tgt.getParent<fapi2::TARGET_TYPE_MC>();
+                FAPI_TRY(putScom(l_mc_tgt, DMI_FIR_REG_AND, l_data));
             }
         }
     }