IPL optimized codes

Change-Id: I9648082ad7742e5b226e5d9242a750db2fe4a910
Original-Change-Id: I60bd09be22ae75561667253204ffd33c6fdeb58d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24060
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Sangeetha T S <sangeet2@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36935
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H

@@ -32,6 +32,7 @@
 ///     4) Similar way,  Reset sys.config and OPCG setting for Nest and MC chiplet in sync mode
 ///
 /// Done
+///
 //------------------------------------------------------------------------------
 // *HWP HW Owner        : Abhishek Agarwal <abagarw8@in.ibm.com>
 // *HWP HW Backup Owner : Srinivas V. Naga <srinivan@in.ibm.com>
@@ -61,7 +62,7 @@ enum P9_SBE_CHIPLET_RESET_Public_Constants
     HANG_PULSE_0X10 = 0x10,
     HANG_PULSE_0X0F = 0x0F,
     HANG_PULSE_0X06 = 0x06,
-    HANG_PULSE_0X17 = 0x18,
+    HANG_PULSE_0X17 = 0x17,
     HANG_PULSE_0X18 = 0x18,
     HANG_PULSE_0X22 = 0x22,
     HANG_PULSE_0X13 = 0x13,
@@ -86,7 +87,9 @@ enum P9_SBE_CHIPLET_RESET_Public_Constants
     SCAN_RATIO_0X0 = 0x0,
     SYNC_CONFIG_4TO1 = 0X0800000000000000,
     HW_NS_DELAY = 200000, // unit is nano seconds
-    SIM_CYCLE_DELAY = 10000 // unit is cycles
+    SIM_CYCLE_DELAY = 10000, // unit is cycles
+    HANG_PULSE_0X12 = 0x12,
+    HANG_PULSE_0X1C = 0x1C
 };
 }
 
@@ -117,7 +120,4 @@ extern "C"
                                            fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip);
 }
 
-fapi2::ReturnCode p9_sbe_chiplet_reset_pcie_iop_logic_setup(
-    const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chip);
-
 #endif