Quiesce procedure for NPU serving openCapi links

This was not available earlier but we need it to block spurious interrupts
that can arrive from adapters on the other side of link during MPIPL.

Change-Id: Iec5198709a084e79a3b9b82f00f6aef66ab28a4e
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/93575
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N Tran <thi@us.ibm.com>
Reviewed-by: John D Irish <jdirish@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/93623
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>

src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_quiesce_errors.xml

@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER HostBoot Project                                             -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2016,2018                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2016,2020                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -35,7 +35,7 @@
     <rc>RC_P9_CAPP_QUIESCE_TIMEOUT</rc>
     <description>
       Procedure: p9_sbe_check_quiesce
-      CAPP quiesce done bit is not set  
+      CAPP quiesce done bit is not set
     </description>
     <ffdc>TARGET</ffdc>
     <ffdc>DATA</ffdc>
@@ -46,19 +46,31 @@
     <rc>RC_P9_NTL_NOT_IN_RESET</rc>
     <description>
       Procedure: p9_sbe_check_quiesce
-      The NTLs are not all in the reset state for the NPU   
+      The NTLs are not all in the reset state for the NPU
     </description>
     <ffdc>TARGET</ffdc>
     <ffdc>NTL_ADDR</ffdc>
     <ffdc>NTL_DATA</ffdc>
   </hwpError>
   <!-- ******************************************************************** -->
+  <hwpError>
+    <sbeError/>
+    <rc>RC_P9_OTL_NOT_IN_RESET</rc>
+    <description>
+      Procedure: p9_sbe_check_quiesce
+      The OTLs are not all in the reset state for this stack
+    </description>
+    <ffdc>PROC_TARGET</ffdc>
+    <ffdc>STATUS_ADDR</ffdc>
+    <ffdc>STATUS_DATA</ffdc>
+  </hwpError>
+  <!-- ******************************************************************** -->
   <hwpError>
     <sbeError/>
     <rc>RC_P9_VAS_QUIESCE_TIMEOUT</rc>
     <description>
       Procedure: p9_sbe_check_quiesce
-      The VAS quiesce was not achieved 
+      The VAS quiesce was not achieved
     </description>
     <ffdc>TARGET</ffdc>
     <ffdc>NORTHDATA</ffdc>
@@ -70,7 +82,7 @@
     <rc>RC_P9_NX_PBI_WRITE_IDLE_TIMEOUT</rc>
     <description>
       Procedure: p9_sbe_check_quiesce
-      The PBI Write Idle never happened 
+      The PBI Write Idle never happened
     </description>
     <ffdc>TARGET</ffdc>
     <ffdc>DATA</ffdc>
@@ -81,7 +93,7 @@
     <rc>RC_P9_NX_CRB_KILL_DONE_TIMEOUT</rc>
     <description>
       Procedure: p9_sbe_check_quiesce
-      CRB kills were not complete 
+      CRB kills were not complete
     </description>
     <ffdc>TARGET</ffdc>
     <ffdc>DATA</ffdc>
@@ -114,7 +126,7 @@
     <rc>RC_P9_WAIT_FOR_DMA_CHANNELS_TO_DRAIN_TIMEOUT</rc>
     <description>
       Procedure: p9_sbe_check_quiesce
-      DMA channels were not drained 
+      DMA channels were not drained
     </description>
     <ffdc>TARGET</ffdc>
     <ffdc>DATA</ffdc>
@@ -125,7 +137,7 @@
     <rc>RC_P9_WAIT_FOR_ERAT_IDLE</rc>
     <description>
       Procedure: p9_sbe_check_quiesce
-      ERAT was not idle 
+      ERAT was not idle
     </description>
     <ffdc>TARGET</ffdc>
     <ffdc>DATA</ffdc>
@@ -147,7 +159,7 @@
     <rc>RC_P9_UMAC_QUIESCE_FAILED</rc>
     <description>
       Procedure: p9_sbe_check_quiesce
-      UMAC status control quiesce failed 
+      UMAC status control quiesce failed
     </description>
     <ffdc>TARGET</ffdc>
     <ffdc>DATA</ffdc>
@@ -158,7 +170,7 @@
     <rc>RC_P9_PSIHBCR_INBOUND_QUEUE_NOT_EMPTY</rc>
     <description>
       Procedure: p9_sbe_check_quiesce
-      PSIHBCR inbound queue not empty 
+      PSIHBCR inbound queue not empty
     </description>
     <ffdc>TARGET</ffdc>
     <ffdc>DATA</ffdc>
@@ -169,7 +181,7 @@
     <rc>RC_P9_INTP_QUIESCE_TIMEOUT</rc>
     <description>
       Procedure: p9_sbe_check_quiesce
-      INTP master or slave is not idle 
+      INTP master or slave is not idle
     </description>
     <ffdc>TARGET</ffdc>
     <ffdc>DATA</ffdc>