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PM: Added support for enable disable of 24x7 IMA.
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Commit incorporates an ability to enable or disable 24x7
IMA. It reads an attribute and populates a field of QPMR
header. 24x7 firmware is expected to read this field
and enable or disable 24x7 IMA by itself.

Key_Cronus_Test=NO_TEST

Change-Id: I1f1fc738a58f11346f7972eb3c547aac0e2f805f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59443
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59451
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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@premsjha @wghoffa
premsjha authored and wghoffa committed Jul 6, 2018
1 parent 0b9c80f commit d2f43e6
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Showing 3 changed files with 58 additions and 10 deletions.
1 change: 1 addition & 0 deletions src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H
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Original file line number Diff line number Diff line change
Expand Up @@ -104,6 +104,7 @@ HCD_HDR_UINT32( stopFfdcLength, 0);
HCD_HDR_UINT32( sgpeBootProgCode, 0 );
HCD_HDR_UINT32( sgpeSramImageSize, 0 );
HCD_HDR_UINT32( maxQuadScomRestoreEntry, 0 );
HCD_HDR_UINT32( enable24x7Ima, 0 );
HCD_HDR_PAD(512);
#ifdef __ASSEMBLER__
.endm
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49 changes: 39 additions & 10 deletions src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
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Original file line number Diff line number Diff line change
Expand Up @@ -1324,6 +1324,7 @@ void updateQpmrHeader( Homerlayout_t* i_pChipHomer, QpmrHeaderLayout_t& io_qpmrH
FAPI_INF(" Quad SCOM Length : 0x%08X", SWIZZLE_4_BYTE(pQpmrHdr->quadScomLength) );
FAPI_DBG(" SGPE SRAM Img Size : 0x%08x", SWIZZLE_4_BYTE(pQpmrHdr->sgpeSramImageSize ) );
FAPI_DBG(" Max SCOM Rest Entry : 0x%08x", SWIZZLE_4_BYTE(pQpmrHdr->maxQuadScomRestoreEntry ) );
FAPI_DBG(" Enable 24x7 Nest IMA : %s", SWIZZLE_4_BYTE(pQpmrHdr->enable24x7Ima )? "Yes" : "No" );
FAPI_DBG("==============================QPMR Ends==============================");

FAPI_DBG("===========================SGPE Image Hdr=============================");
Expand Down Expand Up @@ -4186,11 +4187,10 @@ fapi_try_exit:

/**
* @brief Reads an attribute to determine aux function invocation interval.
* @param[in] i_pHomer points to HOMER.
* @param[out] o_auxFuncIntControl Invocation interval for the auxiliary function.
* @return fapi2 return code.
*/
fapi2::ReturnCode initReadIntervalForAuxFunc( Homerlayout_t* i_pHomer, uint32_t& o_auxFuncIntControl )
fapi2::ReturnCode initReadIntervalForAuxFunc( uint32_t& o_auxFuncIntControl )
{
FAPI_INF(">> initReadIntervalForAuxFunc");
uint8_t readInterAttr = 0;
Expand All @@ -4214,6 +4214,32 @@ fapi_try_exit:
return fapi2::current_err;
}

//---------------------------------------------------------------------------
/**
* @brief Reads an attribute to determine 24x7 enable status
* @param[out] o_24x7Enable true if 24x7 IMA is enabled else disabled.
* @return fapi2 return code.
*/
fapi2::ReturnCode read24x7EnableStatus( uint32_t& o_24x7ImaEnable )
{
FAPI_INF(">> read24x7EnableStatus");
uint8_t l_24x7Enable = 0;
o_24x7ImaEnable = 0;

const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;

FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_NEST_24x7_PERF_ACCUM_ENABLE,
FAPI_SYSTEM,
l_24x7Enable),
"Error From FAPI_ATTR_GET For Attribute ATTR_NEST_24x7_PERF_ACCUM_ENABLE");

o_24x7ImaEnable = l_24x7Enable;
FAPI_DBG("ATTR_NEST_24x7_PERF_ACCUM_ENABLE 0x%08x", o_24x7ImaEnable );

fapi_try_exit:
FAPI_INF("<< read24x7EnableStatus");
return fapi2::current_err;
}
//---------------------------------------------------------------------------

/**
Expand All @@ -4230,19 +4256,22 @@ fapi2::ReturnCode buildSgpeAux( CONST_FAPI2_PROC& i_procTgt, Homerlayout_t*
fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
sgpeHeader_t* pSgpeHdr = (sgpeHeader_t*)& i_pHomer->qpmrRegion.sgpeRegion.sgpeSramImage[SGPE_INT_VECTOR_SIZE];
uint32_t l_sgpeAuxFunc = 0;
uint32_t l_24x7Enable = 0;

//SGPE Image Header
//Offset represented as OCI PBA memory address
pSgpeHdr->g_sgpe_aux_offset = SWIZZLE_4_BYTE(HOMER_AUX_BASE_ADDR);
pSgpeHdr->g_sgpe_aux_length = SWIZZLE_4_BYTE(QPMR_AUX_LENGTH);
FAPI_TRY( initReadIntervalForAuxFunc( l_sgpeAuxFunc ),
"Failed in initReadIntervalForAuxFunc" );
pSgpeHdr->g_sgpe_aux_control = SWIZZLE_4_BYTE(l_sgpeAuxFunc);
pSgpeHdr->g_sgpe_aux_offset = SWIZZLE_4_BYTE(HOMER_AUX_BASE_ADDR);
pSgpeHdr->g_sgpe_aux_length = SWIZZLE_4_BYTE(QPMR_AUX_LENGTH);

//QPMR Header
o_qpmrHdr.quadAuxOffset = SWIZZLE_4_BYTE(QPMR_AUX_OFFSET);
o_qpmrHdr.quadAuxLength = SWIZZLE_4_BYTE(QPMR_AUX_LENGTH);

FAPI_TRY(initReadIntervalForAuxFunc( i_pHomer, l_sgpeAuxFunc ),
"Failed in initReadIntervalForAuxFunc" );
pSgpeHdr->g_sgpe_aux_control = SWIZZLE_4_BYTE(l_sgpeAuxFunc);
FAPI_TRY( read24x7EnableStatus( l_24x7Enable ),
" Failed to read ATTR_NEST_24x7_PERF_ACCUM_ENABLE " );
o_qpmrHdr.enable24x7Ima = SWIZZLE_4_BYTE(l_24x7Enable);
o_qpmrHdr.quadAuxOffset = SWIZZLE_4_BYTE(QPMR_AUX_OFFSET);
o_qpmrHdr.quadAuxLength = SWIZZLE_4_BYTE(QPMR_AUX_LENGTH);

fapi_try_exit:
FAPI_INF("<< buildSgpeAux");
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18 changes: 18 additions & 0 deletions src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
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Original file line number Diff line number Diff line change
Expand Up @@ -2236,5 +2236,23 @@
<platInit/>
<default>FALSE</default>
</attribute>

<!-- ********************************************************************* -->
<attribute>
<id>ATTR_NEST_24x7_PERF_ACCUM_ENABLE</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>
Switch to enable or disable 24x7 IMA. Based on the attribute value, a field of
QPMR header of HOMER is populated while building HOMER. Based on the value in
that field 24x7 code, which runs on GPE1, either starts or stops Nest IMA.

Producer: Initialized by Hostboot firmware based on platform support
Consumers: Read by p9_hcode_image_build.C
</description>
<valueType>uint8</valueType>
<enum>FALSE = 0x00, TRUE = 0x01</enum>
<platInit/>
<default>TRUE</default>
</attribute>
<!-- ********************************************************************* -->
</attributes>

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