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Update explorer scom header files with newer figtree data.
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Change-Id: I2ba7df5fdd7f532f9ad5c2fca202849d443bfea9
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83277
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83427
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
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@BenAtIBM
BenAtIBM authored and Nicholas E Bofferding committed Sep 17, 2019
1 parent d2bcdef commit d534ac3
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Showing 8 changed files with 7,413 additions and 7,159 deletions.
1,074 changes: 519 additions & 555 deletions src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses.H
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56 changes: 54 additions & 2 deletions src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H
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Expand Up @@ -28,7 +28,6 @@
#define __EXPLR_SCOM_ADDRESSES_FIXES_H

static const uint64_t EXPLR_MIPS_TO_OCMB_INTERRUPT_REGISTER1 = 0x2058ull;
static const uint64_t EXPLR_MCBIST_MBSSYMEC9Q = 0x08011861ull;

static const uint64_t EXP_DDR4_PHY_DBYTE0_TXDQSDLYTG0_U0_P0 = 0x04040340ull;
static const uint64_t EXP_DDR4_PHY_DBYTE0_RXCLKDLYTG0_U0_P0 = 0x04040230ull;
Expand Down Expand Up @@ -3146,8 +3145,61 @@ static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R5 = 0x040655acull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R6 = 0x040659acull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R7 = 0x04065dacull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R8 = 0x040661acull;
static const uint64_t EXPLR_RDF_MCBCM2 = 0x08011c35ull;
static const uint64_t EXPLR_TP_MB_UNIT_TOP_TR1_TRACE_TRCTRL_CONFIG = 0x08010442ull;
static const uint64_t EXP_APBONLY0_MICROCONTMUXSEL = 0x04340000ull;


static const uint32_t EXPLR_EFUSE_IMAGE_OUT_0 = 0x20B080ull;


static const uint32_t EXPLR_EFUSE_IMAGE_OUT_1 = 0x20B084ull;


static const uint32_t EXPLR_EFUSE_IMAGE_OUT_2 = 0x20B088ull;


static const uint32_t EXPLR_EFUSE_IMAGE_OUT_3 = 0x20B08Cull;


static const uint32_t EXPLR_EFUSE_PE_DATA_0 = 0x20B090ull;


static const uint32_t EXPLR_EFUSE_PE_DATA_1 = 0x20B094ull;


static const uint32_t EXPLR_EFUSE_PE_DATA_2 = 0x20B098ull;


static const uint32_t EXPLR_EFUSE_PE_DATA_3 = 0x20B09Cull;


static const uint32_t EXPLR_EFUSE_PE_DATA_4 = 0x20B0A0ull;


static const uint32_t EXPLR_EFUSE_PE_DATA_5 = 0x20B0A4ull;


static const uint32_t EXPLR_EFUSE_PE_DATA_6 = 0x20B0A8ull;


static const uint32_t EXPLR_EFUSE_PE_DATA_8 = 0x20B0ACull;


static const uint32_t EXPLR_EFUSE_PE_DATA_9 = 0x20B0B0ull;


static const uint32_t EXPLR_EFUSE_PE_DATA_10 = 0x20B0B4ull;


static const uint32_t EXPLR_EFUSE_PE_DATA_11 = 0x20B0B8ull;


static const uint32_t EXPLR_EFUSE_PE_DATA_12 = 0x20B0BCull;


static const uint32_t EXPLR_EFUSE_PE_DATA_13 = 0x20B0C0ull;


static const uint32_t EXPLR_EFUSE_PE_DATA_14 = 0x20B0C4ull;

#endif
13,427 changes: 6,836 additions & 6,591 deletions src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H
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1 change: 1 addition & 0 deletions src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getidec.C
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Expand Up @@ -37,6 +37,7 @@
#include <exp_getidec.H>
#include <lib/shared/exp_consts.H>
#include <chips/ocmb/explorer/common/include/explorer_scom_addresses.H>
#include <chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H>
#include <chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H>
#include <chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H>
#include <generic/memory/mss_git_data_helper.H>
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9 changes: 0 additions & 9 deletions src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/ccs/ccs_traits_explorer.H
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Expand Up @@ -96,15 +96,11 @@ class ccsTraits<mss::mc_type::EXPLORER>
UE_DISABLE = EXPLR_MCBIST_CCS_MODEQ_UE_DISABLE,
DATA_COMPARE_BURST_SEL = EXPLR_MCBIST_CCS_MODEQ_DATA_COMPARE_BURST_SEL,
DATA_COMPARE_BURST_SEL_LEN = EXPLR_MCBIST_CCS_MODEQ_DATA_COMPARE_BURST_SEL_LEN,
DDR_CAL_TIMEOUT_CNT = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT,
DDR_CAL_TIMEOUT_CNT_LEN = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_LEN,
CFG_PARITY_AFTER_CMD = EXPLR_MCBIST_CCS_MODEQ_CFG_PARITY_AFTER_CMD,
COPY_CKE_TO_SPARE_CKE = EXPLR_MCBIST_CCS_MODEQ_COPY_CKE_TO_SPARE_CKE,
DISABLE_ECC_ARRAY_CHK = EXPLR_MCBIST_CCS_MODEQ_DISABLE_ECC_ARRAY_CHK,
DISABLE_ECC_ARRAY_CORRECTION = EXPLR_MCBIST_CCS_MODEQ_DISABLE_ECC_ARRAY_CORRECTION,
CFG_DGEN_FIXED_MODE = EXPLR_MCBIST_CCS_MODEQ_CFG_DGEN_FIXED_MODE,
DDR_CAL_TIMEOUT_CNT_MULT = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT,
DDR_CAL_TIMEOUT_CNT_MULT_LEN = EXPLR_MCBIST_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT_LEN,
IDLE_PAT_ADDRESS_0_13 = EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_0_13,
IDLE_PAT_ADDRESS_0_13_LEN = EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_0_13_LEN,
IDLE_PAT_ADDRESS_17 = EXPLR_MCBIST_CCS_MODEQ_IDLE_PAT_ADDRESS_17,
Expand Down Expand Up @@ -157,8 +153,6 @@ class ccsTraits<mss::mc_type::EXPLORER>
ARR0_DDR_CID_2 = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CID_2,
ARR0_DDR_ODT = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ODT,
ARR0_DDR_ODT_LEN = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_ODT_LEN,
ARR0_DDR_CAL_TYPE = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CAL_TYPE,
ARR0_DDR_CAL_TYPE_LEN = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_CAL_TYPE_LEN,
ARR0_DDR_PARITY = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_PARITY,
ARR0_DDR_BANK_2 = EXPLR_MCBIST_CCS_INST_ARR0_00_DDR_BANK_2,
ARR0_LOOP_BREAK_MODE = EXPLR_MCBIST_CCS_INST_ARR0_00_LOOP_BREAK_MODE,
Expand All @@ -172,9 +166,6 @@ class ccsTraits<mss::mc_type::EXPLORER>
ARR1_READ_OR_WRITE_DATA = EXPLR_MCBIST_CCS_INST_ARR1_00_READ_OR_WRITE_DATA,
ARR1_READ_OR_WRITE_DATA_LEN = EXPLR_MCBIST_CCS_INST_ARR1_00_READ_OR_WRITE_DATA_LEN,
ARR1_READ_COMPARE_REQUIRED = EXPLR_MCBIST_CCS_INST_ARR1_00_READ_COMPARE_REQUIRED,
ARR1_DDR_CAL_RANK = EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CAL_RANK,
ARR1_DDR_CAL_RANK_LEN = EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CAL_RANK_LEN,
ARR1_DDR_CALIBRATION_ENABLE = EXPLR_MCBIST_CCS_INST_ARR1_00_DDR_CALIBRATION_ENABLE,
ARR1_END = EXPLR_MCBIST_CCS_INST_ARR1_00_END,
ARR1_GOTO_CMD = EXPLR_MCBIST_CCS_INST_ARR1_00_GOTO_CMD,
ARR1_GOTO_CMD_LEN = EXPLR_MCBIST_CCS_INST_ARR1_00_GOTO_CMD_LEN,
Expand Down
1 change: 1 addition & 0 deletions src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.C
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Expand Up @@ -36,6 +36,7 @@
#include <lib/i2c/exp_i2c.H>
#include <lib/shared/exp_consts.H>
#include <explorer_scom_addresses.H>
#include <explorer_scom_addresses_fixes.H>
#include <explorer_scom_addresses_fld_fixes.H>
#include <mss_explorer_attribute_setters.H>
#include <generic/memory/lib/utils/mss_buffer_utils.H>
Expand Down
2 changes: 1 addition & 1 deletion src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H
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Expand Up @@ -103,7 +103,7 @@ class portTraits< mss::mc_type::EXPLORER >
ECC_USE_ADDR_HASH = EXPLR_RDF_RECR_MBSECCQ_USE_ADDRESS_HASH,

PORT_FAIL_DISABLE = EXPLR_SRQ_MBA_FARB0Q_CFG_PORT_FAIL_DISABLE,
DFI_INIT_START = EXPLR_SRQ_MBA_FARB0Q_CFG_MISR_FEEDBACK_ENABLE,
DFI_INIT_START = EXPLR_SRQ_MBA_FARB0Q_CFG_INIT_START,
RCD_RECOVERY_DISABLE = EXPLR_SRQ_MBA_FARB0Q_CFG_DISABLE_RCD_RECOVERY,

RECR_ENABLE_UE_NOISE_WINDOW = EXPLR_RDF_RECR_MBSECCQ_ENABLE_UE_NOISE_WINDOW,
Expand Down
2 changes: 1 addition & 1 deletion src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.C
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Expand Up @@ -69,7 +69,7 @@ fapi2::ReturnCode setup_omi_dl0_config0(
"Error reading EXPLR_DLX_DL0_CONFIG0 on %s", mss::c_str(i_target));

// CFG_DL0_HALF_WIDTH_BACKOFF_ENABLE: dl0 x4 backoff enabled
l_config0.writeBit<EXPLR_DLX_DL0_CONFIG0_CFG_X4_BACKOFF_ENABLE>(i_dl_x4_backoff_en);
l_config0.writeBit<EXPLR_DLX_DL0_CONFIG0_CFG_HALF_WIDTH_BACKOFF_ENABLE>(i_dl_x4_backoff_en);

// CFG_DL0_TRAIN_MODE: dl0 train mode
l_config0.insertFromRight<EXPLR_DLX_DL0_CONFIG0_CFG_TRAIN_MODE,
Expand Down

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