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Adapt p9_sbe_check_master_stop15 for bad path on non-SBE platforms fo…
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…r fleetwood

1. On PENDING/INVALID_STATE RCs, need some FFDC and service actions on FSP
   using regular FAPI mechanisms like FAPI_ASSERT and register ffdc colletion

2. SBE still uses existing mechanism and restrictions - optimized for space
 a. no fapi error xml based callbacks
 b. no fapi error xml based register ffdc collection
 c. max local ffdc members < 20
 d. depends on p9_collect_deadman_ffdc for FFDC with RC TIMEOUT

3. Compile out extra code on SBE builds

Change-Id: Id35f9a7dbfc7e423bd7cf0846f493a8270a48cd6
CQ: SW430391
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60320
Reviewed-by: RANGANATHPRASAD BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60389
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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am10dolkar authored and crgeddes committed Jun 20, 2018
1 parent 27fc2d9 commit dc3e007
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37 changes: 36 additions & 1 deletion src/import/chips/p9/procedures/xml/error_info/p9_pm_registers.xml
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Original file line number Diff line number Diff line change
Expand Up @@ -659,5 +659,40 @@
<scomRegister>PU_OCB_OCI_OCCS2_SCOM</scomRegister>
</registerFfdc>

<!-- ******************************************************************** -->
<!-- *********************************************************************** -->
<registerFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_PU</id>
<scomRegister>PU_OCB_OCI_OCCFLG_SCOM</scomRegister>
<scomRegister>PU_OCB_OCI_CCSR_SCOM</scomRegister>
<scomRegister>PU_OCB_OCI_QCSR_SCOM</scomRegister>
<scomRegister>PU_OCB_OCI_QSSR_SCOM</scomRegister>
<scomRegister>PU_GPE3_PPE_XIDBGPRO</scomRegister>
<scomRegister>PU_GPE3_PPE_XIRAMEDR</scomRegister>
<scomRegister>PU_GPE3_PPE_XIRAMDBG</scomRegister>
</registerFfdc>

<!-- *********************************************************************** -->
<registerFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_EQ</id>
<scomRegister>EQ_PPM_SSHSRC</scomRegister>
</registerFfdc>

<!-- *********************************************************************** -->
<registerFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_EX</id>
<scomRegister>EX_CME_SCOM_LFIR</scomRegister>
<scomRegister>EX_CME_SCOM_SICR_SCOM</scomRegister>
<scomRegister>EX_CME_LCL_SISR_SCOM</scomRegister>
<scomRegister>EX_PPE_XIDBGPRO</scomRegister>
<scomRegister>EX_PPE_XIRAMEDR</scomRegister>
<scomRegister>EX_PPE_XIRAMDBG</scomRegister>
</registerFfdc>

<!-- *********************************************************************** -->
<registerFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_EC</id>
<scomRegister>C_PPM_SSHSRC</scomRegister>
</registerFfdc>

<!-- *********************************************************************** -->
</hwpErrors>
76 changes: 71 additions & 5 deletions src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml
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Expand Up @@ -5,7 +5,7 @@
<!-- -->
<!-- OpenPOWER HostBoot Project -->
<!-- -->
<!-- Contributors Listed Below - COPYRIGHT 2015,2017 -->
<!-- Contributors Listed Below - COPYRIGHT 2015,2018 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
Expand All @@ -30,11 +30,43 @@
Procedure: p9_sbe_check_master_stop15
Indicates the targeted core is either running (hasn't started to enter
a STOP state) or is in transition. This return code would be used by the
caller (SBE control loop) to determine whether to continue polling for a
completed transition.

Note: STOP 11 and STOP 15 are equivalent for POWER9.
caller (FSP/SBE control loop) to determine whether to continue polling
for a completed transition.
</description>

<collectFfdc>p9_eq_clear_atomic_lock,EQ</collectFfdc>

<collectRegisterFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_PU</id>
<target>PU</target>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_EQ</id>
<target>EQ</target>
<targetType>TARGET_TYPE_EQ</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_EX</id>
<target>EX</target>
<targetType>TARGET_TYPE_EX</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_EC</id>
<target>EC</target>
<targetType>TARGET_TYPE_CORE</targetType>
</collectRegisterFfdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
<callout>
<procedure>LVL_SUPPORT</procedure>
<priority>LOW</priority>
</callout>
<deconfigure>
<target>EC</target>
</deconfigure>
</hwpError>
<!-- ******************************************************************** -->
<hwpError>
Expand All @@ -44,6 +76,40 @@
Indicates the targeted core is no longer pending entering a STOP state
but the achieved level is not appropriate.
</description>

<collectFfdc>p9_eq_clear_atomic_lock,EQ</collectFfdc>

<collectRegisterFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_PU</id>
<target>PU</target>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_EQ</id>
<target>EQ</target>
<targetType>TARGET_TYPE_EQ</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_EX</id>
<target>EX</target>
<targetType>TARGET_TYPE_EX</targetType>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>CHECK_MASTER_STOP15_FFDC_REGS_EC</id>
<target>EC</target>
<targetType>TARGET_TYPE_CORE</targetType>
</collectRegisterFfdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
<callout>
<procedure>LVL_SUPPORT</procedure>
<priority>LOW</priority>
</callout>
<deconfigure>
<target>EC</target>
</deconfigure>
</hwpError>
<!-- ******************************************************************** -->
<hwpError>
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