resolve Zeppelin DMI channel framelock issues

p9_sbe_chiplet_reset
p9c_mc_scom
  resolve HW CQ 418671
  set MC CPLT_CONF1 FASTX2 ratio controls in p9_sbe_chiplet_reset
  need to set prior to MC chiplet clock start for proper functional operation
  remove from initfile

p9_cen_framelock
  resolve HW CQ 418901
  analyze captured FRTL value along with FRTL counter overflow error FIR

centaur.mcs.scan.initfile
cen_scominits
  enable MBI trace array prior to framelock, to make usable for future debug

Update p9c.mc.initfile to include fix for ZCAL to help with conflicts - bgass

Change-Id: Ia3f17a46489cbf7f2804aa57ad4d6f62d315dc9a
Original-Change-Id: I7897d41250b9c113adf22fe40a8ca5971bca2a6f
CQ: HW418671
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44708
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: LENNARD G. STREAT <lstreat@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45854
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

src/import/chips/p9/procedures/hwp/initfiles/p9c_mc_scom.C

@@ -29,26 +29,26 @@
 
 using namespace fapi2;
 
-constexpr uint64_t literal_0x3 = 0x3;
+constexpr uint64_t literal_0b01110 = 0b01110;
 
 fapi2::ReturnCode p9c_mc_scom(const fapi2::Target<fapi2::TARGET_TYPE_MC>& TGT0,
                               const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& TGT1)
 {
     {
         fapi2::buffer<uint64_t> l_scom_buffer;
-        {
-            FAPI_TRY(fapi2::getScom( TGT0, 0x7000009ull, l_scom_buffer ));
-
-            l_scom_buffer.insert<16, 2, 62, uint64_t>(literal_0x3 );
-            FAPI_TRY(fapi2::putScom(TGT0, 0x7000009ull, l_scom_buffer));
-        }
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x70123afull, l_scom_buffer ));
 
             constexpr auto l_MCP_MISC_MBA_SCOMFIR_MCBPARMQ_CFG_CLOCK_MONITOR_EN_ON = 0x1;
             l_scom_buffer.insert<59, 1, 63, uint64_t>(l_MCP_MISC_MBA_SCOMFIR_MCBPARMQ_CFG_CLOCK_MONITOR_EN_ON );
             FAPI_TRY(fapi2::putScom(TGT0, 0x70123afull, l_scom_buffer));
         }
+        {
+            FAPI_TRY(fapi2::getScom( TGT0, 0x800f1c000701103full, l_scom_buffer ));
+
+            l_scom_buffer.insert<48, 5, 59, uint64_t>(literal_0b01110 );
+            FAPI_TRY(fapi2::putScom(TGT0, 0x800f1c000701103full, l_scom_buffer));
+        }
 
     };
 fapi_try_exit: