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Re-read SBE doorbell register in simics if PSU interrupt is found
We use PSU interrupts to signal between the host and the SBE if there is a PSU message available for each other. Bit 0 in the doorbell reg tells hostboot that the SBE has put a message in the communication registers. Once hostboot sees this it is responsible for clearing that bit so the SBE knows it can send another msg. We are seeing a problem in simics where hostboot is not clearing this bit, we think its because when hostboot checks if the bit is set, the simics has not set the value yet, so hostboot never clears it. This change adds a retry in simics so we will re-read the doorbell register if we take a PSU interrupt and the doorbell register is saying its empty. We are hoping this wait+retry will give the simics models enough time to catch up if this is indeed the problem. This issue has not been observed in real HW. Change-Id: I85c63fe545d473d55f6ec0fb554b6c760ae5cbf8 CQ: SW444734 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66622 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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