Add attribute engine algorithm for eff_config and pre_eff_config

Change-Id: I8498c143109fa1d1a2c9ad5492476e72f51ba509
Original-Change-Id: I2c89e6da17511462afbc661680d19df18a4708f4
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72962
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74689
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H

@@ -33,8 +33,8 @@
 // *HWP Level: 2
 // *HWP Consumed by: CI
 
-#ifndef EXP_CONSTS_H
-#define EXP_CONSTS_H
+#ifndef MSS_EXP_CONSTS_H
+#define MSS_EXP_CONSTS_H
 
 #include <generic/memory/lib/utils/shared/mss_generic_consts.H>
 
@@ -48,6 +48,30 @@ namespace exp
 
 constexpr uint32_t OCMB_ADDR_SHIFT = 3;
 
+///
+/// @brief enum list of explorer eff attributes to set
+///
+enum attr_eff_engine_fields
+{
+    // Template recursive base case
+    ATTR_EFF_BASE_CASE = 0,
+
+    // Attrs to set
+    BYTE_ENABLES = 1,
+    NIBBLE_ENABLES = 2,
+    SPD_TAA_MIN = 3,
+    FOUR_RANK_MODE = 4,
+    DDP_COMPATIBILITY = 5,
+    TSV_8H_SUPPORT = 6,
+    PSTATES = 7,
+    MRAM_SUPPORT = 8,
+    HEIGHT_3DS = 9,
+    SPD_CL_SUPPORTED = 10,
+
+    // Dispatcher set to last enum value
+    ATTR_EFF_DISPATCHER = SPD_CL_SUPPORTED,
+};
+
 ///
 /// @brief common explorer sizes
 ///
@@ -66,6 +90,18 @@ enum ffdc_codes
     EXP_I2C_SET_FIELD = 0x0001,
     READ_HOST_FW_RESPONSE_STRUCT = 0x0003,
     READ_SENSOR_CACHE_STRUCT = 0x0004,
+
+    SET_BYTE_ENABLES = 0x1041,
+    SET_NIBBLE_ENABLES = 0x1042,
+    SET_TAA_MIN = 0x1043,
+    SET_FOUR_RANK_MODE = 0x1044,
+    SET_DDP_COMPATIBILITY = 0x1045,
+    SET_TSV_8H_SUPPORT = 0x1046,
+    SET_VREF_DQ_TRAIN_RANGE = 0x1047,
+    SET_PSTATES = 0x1048,
+    SET_MRAM_SUPPORT = 0x1049,
+    SET_3DS_HEIGHT = 0x1050,
+    SET_SPD_CL_SUPPORTED = 0x1051,
 };
 
 namespace i2c

src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C

@@ -34,8 +34,14 @@
 // *HWP Consumed by: FSP:HB
 
 // fapi2
+#include <fapi2.H>
 #include <p9a_mss_eff_config.H>
-
+#include <generic/memory/lib/data_engine/data_engine.H>
+#include <generic/memory/lib/utils/find.H>
+#include <generic/memory/lib/spd/ddimm/efd_factory.H>
+#include <vpd_access.H>
+#include <mss_generic_attribute_getters.H>
+#include <lib/eff_config/explorer_attr_engine_traits.H>
 
 ///
 /// @brief Configure the attributes for each controller
@@ -44,5 +50,63 @@
 ///
 fapi2::ReturnCode p9a_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target )
 {
-    return fapi2::FAPI2_RC_SUCCESS;
+    // Workaround until DIMM level attrs work
+    uint8_t l_ranks[mss::exp::MAX_DIMM_PER_PORT] = {};
+
+    // Get EFD size - should only need to do it once
+    const auto l_ocmb = mss::find_target<fapi2::TARGET_TYPE_OCMB_CHIP>(i_target);
+    fapi2::MemVpdData_t l_vpd_type(fapi2::EFD);
+    fapi2::VPDInfo<fapi2::TARGET_TYPE_OCMB_CHIP> l_vpd_info(l_vpd_type);
+    FAPI_TRY( fapi2::getVPD(l_ocmb, l_vpd_info, nullptr) );
+
+    FAPI_TRY( mss::attr::get_num_master_ranks_per_dimm(i_target, l_ranks) );
+
+    for(const auto& dimm : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target))
+    {
+        uint8_t l_dimm_index = 0;
+        uint64_t l_freq = 0;
+        FAPI_TRY( mss::attr::get_freq(mss::find_target<fapi2::TARGET_TYPE_MEM_PORT>(dimm), l_freq) );
+
+        // Quick hack to get the index until DIMM level attrs work
+        FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_REL_POS, dimm, l_dimm_index) );
+
+        for( auto rank = 0; rank < l_ranks[l_dimm_index]; ++rank )
+        {
+            std::shared_ptr<mss::efd::base_decoder> l_efd_data;
+
+            // Get EFD data
+            l_vpd_info.iv_rank = rank;
+            l_vpd_info.iv_omi_freq_mhz = l_freq;
+            std::vector<uint8_t> l_vpd_raw (l_vpd_info.iv_size, 0);
+            FAPI_TRY( fapi2::getVPD(l_ocmb, l_vpd_info, l_vpd_raw.data()) );
+
+            // Instantiate EFD decoder
+            FAPI_TRY( mss::efd::factory(l_ocmb, l_vpd_raw, l_vpd_info.iv_rank, l_efd_data) );
+
+            // Set up SI ATTRS
+            FAPI_TRY( mss::attr_si_engine<mss::attr_si_engine_fields>::set(l_efd_data) );
+        }
+
+        {
+            std::vector<uint8_t> l_raw_spd;
+            FAPI_TRY(mss::spd::get_raw_data(dimm, l_raw_spd));
+            {
+                // Gets the SPD facade
+                fapi2::ReturnCode l_rc(fapi2::FAPI2_RC_SUCCESS);
+                mss::spd::facade l_spd_decoder(dimm, l_raw_spd, l_rc);
+
+                // Checks that the facade was setup correctly
+                FAPI_TRY( l_rc, "Failed to initialize SPD facade for %s", mss::spd::c_str(dimm) );
+
+                // Set up generic SPD ATTRS
+                FAPI_TRY( mss::attr_eff_engine<mss::attr_eff_engine_fields>::set(l_spd_decoder) );
+
+                // Set up explorer SPD ATTRS
+                FAPI_TRY( mss::attr_eff_engine<mss::exp::attr_eff_engine_fields>::set(l_spd_decoder) );
+            }
+        }
+    }// dimm
+
+fapi_try_exit:
+    return fapi2::current_err;
 }

src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.mk

@@ -27,5 +27,5 @@
 -include 00p9a_common.mk
 
 PROCEDURE=p9a_mss_eff_config
-$(eval $(call ADD_MEMORY_INCDIRS,$(PROCEDURE)))
+$(eval $(call ADD_P9A_MEMORY_INCDIRS,$(PROCEDURE)))
 $(call BUILD_PROCEDURE)

src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq.C

@@ -33,8 +33,11 @@
 // *HWP Level: 1
 // *HWP Consumed by: FSP:HB
 
-// fapi2
 #include <p9a_mss_freq.H>
+#include <generic/memory/lib/data_engine/p9a/p9a_data_init_traits.H>
+#include <generic/memory/lib/data_engine/data_engine.H>
+#include <generic/memory/lib/utils/find.H>
+#include <generic/memory/lib/spd/spd_facade.H>
 
 ///
 /// @brief Calculate and save off DIMM frequencies
@@ -43,5 +46,27 @@
 ///
 fapi2::ReturnCode p9a_mss_freq( const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target )
 {
-    return fapi2::FAPI2_RC_SUCCESS;
+    // We will first set pre-eff_config attribes
+    for(const auto& d : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target))
+    {
+        std::vector<uint8_t> l_raw_spd;
+        FAPI_TRY(mss::spd::get_raw_data(d, l_raw_spd));
+        {
+            // Gets the SPD facade
+            fapi2::ReturnCode l_rc(fapi2::FAPI2_RC_SUCCESS);
+            mss::spd::facade l_spd_decoder(d, l_raw_spd, l_rc);
+
+            // Checks that the facade was setup correctly
+            FAPI_TRY( l_rc, "Failed to initialize SPD facade for %s", mss::spd::c_str(d) );
+
+            FAPI_TRY( mss::attr_eff_engine<mss::pre_data_init_fields>::set(l_spd_decoder) );
+        }
+
+        // TK - Remove hard-code FREQ -- Should we have enums? Louis problem now
+        uint64_t HARDCODE_FREQ_LOUIS_REMOVE = 25600;
+        FAPI_TRY( mss::attr::set_freq(i_target, HARDCODE_FREQ_LOUIS_REMOVE) );
+    }// dimm
+
+fapi_try_exit:
+    return fapi2::current_err;
 }