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OR mux select with the "enable" bit 0b1000 when making selection
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During simics bringup we figured out that the mux selects needed to
be between 8-15. We learned during bringup this is because the real
0-7 select needs to be OR'ed with the enable bit for the model of
mux. This commit does the ORing correctly and subtracts 8 from all
of the muxSelects used in the simics xml so we match what the MRW
is doing.

Change-Id: I45faab455afdfc63ac05fc2637890f9d0137a444
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81397
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
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@crgeddes @dcrowell77
crgeddes authored and dcrowell77 committed Aug 1, 2019
1 parent 7e05c2e commit ed0430e
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Showing 2 changed files with 37 additions and 26 deletions.
15 changes: 13 additions & 2 deletions src/usr/i2c/i2c.C
View file
Expand Up @@ -1293,11 +1293,22 @@ errlHndl_t i2cAccessMux( TARGETING::Target* i_masterTarget,
if (! (l_i2cMuxTarget->tryGetAttr<TARGETING::ATTR_FAPI_I2C_CONTROL_INFO>(l_muxData)) )
{
TRACFCOMP(g_trac_i2c,
"i2cAccessMux(): get attributes failed");
"i2cAccessMux(): getting ATTR_FAPI_I2C_CONTROL_INFO failed");
break;
}

uint8_t l_muxSelector = i_i2cMuxBusSelector;
TARGETING::ATTR_MODEL_type l_muxModel;
if (! (l_i2cMuxTarget->tryGetAttr<TARGETING::ATTR_MODEL>(l_muxModel)) )
{
TRACFCOMP(g_trac_i2c,
"i2cAccessMux(): getting ATTR_MODEL failed");
break;
}

assert(l_muxModel == TARGETING::MODEL_PCA9847, "Invalid model of mux detected");
const uint8_t PCA9847_ENABLE_BIT = 8;

uint8_t l_muxSelector = i_i2cMuxBusSelector | PCA9847_ENABLE_BIT;
uint8_t *l_ptrMuxSelector = &l_muxSelector;
size_t l_muxSelectorSize = sizeof(l_muxSelector);

Expand Down
48 changes: 24 additions & 24 deletions src/usr/targeting/common/xmltohb/simics_AXONE.system.xml
View file
Expand Up @@ -8498,7 +8498,7 @@
<!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model -->
<field><id>port</id><value>1</value></field>
<field><id>devAddr</id><value>0x40</value></field>
<field><id>i2cMuxBusSelector</id><value>0x08</value></field>
<field><id>i2cMuxBusSelector</id><value>0x00</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand All @@ -8518,8 +8518,8 @@
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x08</value></field>
<!-- Valid Mux Bus Selections are 0x00-0x07 -->
<field><id>i2cMuxBusSelector</id><value>0x00</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand Down Expand Up @@ -8568,7 +8568,7 @@
<!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model -->
<field><id>port</id><value>1</value></field>
<field><id>devAddr</id><value>0x40</value></field>
<field><id>i2cMuxBusSelector</id><value>0x09</value></field>
<field><id>i2cMuxBusSelector</id><value>0x01</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand All @@ -8589,8 +8589,8 @@
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x09</value></field>
<!-- Valid Mux Bus Selections are 0x00-0x07 -->
<field><id>i2cMuxBusSelector</id><value>0x01</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand Down Expand Up @@ -8639,7 +8639,7 @@
<!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model -->
<field><id>port</id><value>1</value></field>
<field><id>devAddr</id><value>0x40</value></field>
<field><id>i2cMuxBusSelector</id><value>0x0A</value></field>
<field><id>i2cMuxBusSelector</id><value>0x2</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand All @@ -8659,8 +8659,8 @@
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0A</value></field>
<!-- Valid Mux Bus Selections are 0x00-0x07 -->
<field><id>i2cMuxBusSelector</id><value>0x02</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand Down Expand Up @@ -8709,7 +8709,7 @@
<!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model -->
<field><id>port</id><value>1</value></field>
<field><id>devAddr</id><value>0x40</value></field>
<field><id>i2cMuxBusSelector</id><value>0x0B</value></field>
<field><id>i2cMuxBusSelector</id><value>0x03</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand All @@ -8729,8 +8729,8 @@
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0B</value></field>
<!-- Valid Mux Bus Selections are 0x00-0x07 -->
<field><id>i2cMuxBusSelector</id><value>0x03</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand Down Expand Up @@ -8779,7 +8779,7 @@
<!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model -->
<field><id>port</id><value>1</value></field>
<field><id>devAddr</id><value>0x40</value></field>
<field><id>i2cMuxBusSelector</id><value>0x0C</value></field>
<field><id>i2cMuxBusSelector</id><value>0x04</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand All @@ -8798,8 +8798,8 @@
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0C</value></field>
<!-- Valid Mux Bus Selections are 0x00-0x07 -->
<field><id>i2cMuxBusSelector</id><value>0x04</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand Down Expand Up @@ -8848,7 +8848,7 @@
<!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model -->
<field><id>port</id><value>1</value></field>
<field><id>devAddr</id><value>0x40</value></field>
<field><id>i2cMuxBusSelector</id><value>0x0D</value></field>
<field><id>i2cMuxBusSelector</id><value>0x05</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand All @@ -8867,8 +8867,8 @@
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0D</value></field>
<!-- Valid Mux Bus Selections are 0x00-0x07 -->
<field><id>i2cMuxBusSelector</id><value>0x05</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand Down Expand Up @@ -8917,7 +8917,7 @@
<!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model -->
<field><id>port</id><value>1</value></field>
<field><id>devAddr</id><value>0x40</value></field>
<field><id>i2cMuxBusSelector</id><value>0x0E</value></field>
<field><id>i2cMuxBusSelector</id><value>0x06</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand All @@ -8936,8 +8936,8 @@
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0E</value></field>
<!-- Valid Mux Bus Selections are 0x00-0x07 -->
<field><id>i2cMuxBusSelector</id><value>0x06</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand Down Expand Up @@ -8986,7 +8986,7 @@
<!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model -->
<field><id>port</id><value>1</value></field>
<field><id>devAddr</id><value>0x40</value></field>
<field><id>i2cMuxBusSelector</id><value>0x0F</value></field>
<field><id>i2cMuxBusSelector</id><value>0x07</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand All @@ -9005,8 +9005,8 @@
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0F</value></field>
<!-- Valid Mux Bus Selections are 0x00-0x07 -->
<field><id>i2cMuxBusSelector</id><value>0x07</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
Expand Down

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