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p9_adu_access and p9_adu_setup L2 procedures
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Change-Id: I1c42feddfa2cfadbfb16b3e2185bd771d82c331a
Original-Change-Id: Id374670d8f75dc74f37967f6c95ef773796e3f1e
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21092
Tested-by: Jenkins Server
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49794
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Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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CHRISTINA L. GRAVES authored and crgeddes committed Nov 16, 2017
1 parent 102eb38 commit f01a301
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110 changes: 110 additions & 0 deletions src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
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/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
//--------------------------------------------------------------------------
//
//
/// @file p9_adu_access.C
/// @brief Read coherent state of memory via the ADU (FAPI)
///
// *HWP HWP Owner Christina Graves clgraves@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
// *HWP Level: 2
// *HWP Consumed by: SBE
//
//--------------------------------------------------------------------------


//--------------------------------------------------------------------------
// Includes
//--------------------------------------------------------------------------
#include <p9_adu_access.H>
#include <p9_adu_coherent_utils.H>

extern "C" {

//--------------------------------------------------------------------------
// HWP entry point
//--------------------------------------------------------------------------
fapi2::ReturnCode p9_adu_access(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
const uint64_t i_address,
const bool i_rnw,
const uint32_t i_flags,
const bool i_firstGranule,
const bool i_lastGranule,
uint8_t io_data[])
{
// mark HWP entry
FAPI_DBG("Entering ...\n");

if(i_lastGranule && (i_flags & FLAG_AUTOINC))
{
//call this function to clear the altd_auto_inc bit before the last iteration
FAPI_TRY(p9_adu_coherent_clear_autoinc(i_target), "Error from p9_adu_coherent_clear_autoinc");
}

if (i_rnw)
{
//read the data
FAPI_TRY(p9_adu_coherent_adu_read(i_target, i_firstGranule, i_address, i_flags, io_data),
"Error from p9_adu_coherent_adu_read");
}
else
{
//write the data
FAPI_TRY(p9_adu_coherent_adu_write(i_target, i_firstGranule, i_address, i_flags, io_data),
"Error from p9_adu_coherent_adu_write");
}

//If we are not in fastmode or this is the last granule, we want to check the status
if ((i_lastGranule) || !(i_flags & FLAG_FASTMODE))
{
FAPI_TRY(p9_adu_coherent_status_check(i_target, ((i_flags & FLAG_AUTOINC)
&& !i_lastGranule)), "Error from p9_adu_coherent_status_check");

//If it's the last read/write
if (i_lastGranule)
{
FAPI_TRY(p9_adu_coherent_cleanup_adu(i_target),
"Error doing p9_adu_coherent_cleanup_adu");
}
}

fapi_try_exit:

if (fapi2::current_err
&& !(i_flags & FLAG_LEAVE_DIRTY))
{
(void) p9_adu_coherent_utils_reset_adu(i_target);
uint32_t num_attempts = i_flags & FLAG_LOCK_TRIES;
(void) p9_adu_coherent_manage_lock(i_target, false, false, num_attempts);
}

FAPI_DBG("Exiting...");
return fapi2::current_err;
}

} // extern "C"
103 changes: 103 additions & 0 deletions src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
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/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
//-----------------------------------------------------------------------------------
//
/// @file p9_adu_access.H
/// @brief Read coherent state of memory via the ADU (FAPI)
///
// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
// *HWP Level: 1
// *HWP Consumed by:
// ----------------------------------------------------------------------------------
//
// *! ADDITIONAL COMMENTS :
// *!
// *! The purpose of this procedure is to perform a coherent read from system
// *! memory via fabric commands issued from the ADU.
// *!
// *! Succcessful operation assumes that:
// *! o System clocks are running
// *! o Fabric is initalized
// *!
// *!
//-----------------------------------------------------------------------------------

#ifndef _P9_ADU_ACCESS_H_
#define _P9_ADU_ACCESS_H_

//-----------------------------------------------------------------------------------
// Includes
//-----------------------------------------------------------------------------------

#include <fapi2.H>
#include <p9_adu_constants.H>
#include <p9_pba_constants.H>

//-----------------------------------------------------------------------------------
// Structure definitions
//-----------------------------------------------------------------------------------

//function pointer typedef definition for HWP call support
typedef fapi2::ReturnCode
(*p9_adu_access_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&,
const uint64_t,
const bool,
const uint32_t,
const bool,
const bool,
uint8_t[] );

//-----------------------------------------------------------------------------------
// Constant definitions
//-----------------------------------------------------------------------------------

extern "C" {

//-----------------------------------------------------------------------------------
// Function prototype
//-----------------------------------------------------------------------------------

/// @brief do the actual read/write from the ADU
/// @param[in] i_target => P9 chip target
/// @param[in] i_address => base real address for read/write operation (expected to be 8B aligned)
/// @param[in] i_rnw => if the operation is a read not write (1 for read, 0 for write)
/// @param[in] i_flags => other information that is needed - the flags are:
/// @param[in] i_lastGranule => if this is the last 8B of data that we are collecting (true = last granule, false = not last granule)
/// @param[in] i_firstGranule => if this is the first 8B of data that we are collecting (true = first granule, false = not first granule)
/// @param[in, out] io_data => The data is read/written
/// @return FAPI_RC_SUCCESS if the read/write completes successfully
fapi2::ReturnCode p9_adu_access(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
const uint64_t i_address,
const bool i_rnw,
const uint32_t i_flags,
const bool i_firstGranule,
const bool i_lastGranule,
uint8_t io_data[]);
} //extern "C"

#endif //_P9_ADU_ACCESS_H_
110 changes: 110 additions & 0 deletions src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
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@@ -0,0 +1,110 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
//--------------------------------------------------------------------------
//
/// @file p9_adu_setup.C
/// @brief Setup the registers for a read/write to the ADU
//
// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
// *HWP Level: 2
// *HWP Consumed by: SBE
//
//--------------------------------------------------------------------------

//--------------------------------------------------------------------------
// Includes
//--------------------------------------------------------------------------
#include <p9_adu_setup.H>
#include <p9_adu_coherent_utils.H>

extern "C"
{

//--------------------------------------------------------------------------
// HWP entry point
//--------------------------------------------------------------------------
fapi2::ReturnCode p9_adu_setup(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>
& i_target,
const uint64_t i_address,
const bool i_rnw,
const uint32_t i_flags,
uint32_t& o_numGranules)
{
//return code
uint32_t num_attempts = 1;
bool lock_pick = false;

// mark HWP entry
FAPI_DBG("Entering ...\n");

//ADU status/control information
bool adu_is_dirty = false;
bool adu_leave_dirty = i_flags & FLAG_LEAVE_DIRTY;

//check arguments
FAPI_TRY(p9_adu_coherent_utils_check_args(i_target, i_address),
"Error from p9_adu_coherent_utils_check_args");

//ensure fabric is running
FAPI_TRY(p9_adu_coherent_utils_check_fbc_state(i_target),
"Error from p9_adu_coherent_utils_check_fbc_status");

//reset ADU state machines and status register
FAPI_TRY(p9_adu_coherent_utils_reset_adu(i_target), "p9_adu_setup: Error from p9_adu_coherent_utils_reset_adu");

//acquire ADU lock to guarantee exclusive use of the ADU resources
lock_pick = i_flags & FLAG_LOCK_PICK;
num_attempts = i_flags & FLAG_LOCK_TRIES;
FAPI_TRY(p9_adu_coherent_manage_lock(i_target, lock_pick, true, num_attempts),
"Error from p9_adu_coherent_manage_lock");

//figure out how many granules can be requested before setup needs to be run again
FAPI_TRY(p9_adu_coherent_utils_get_num_granules(i_address, o_numGranules),
"Error from p9_adu_coherent_utils_get_num_granules");

//Set dirty since we need to attempt to cleanup/release the lock so the ADU is not in a locked state if operation fails from this point
adu_is_dirty = true;

//setup the ADU registers for the read/write
FAPI_TRY(p9_adu_coherent_setup_adu(i_target, i_address, i_rnw, i_flags),
"Error from p9_adu_coherent_setup_registers");

fapi_try_exit:

//if an error has occurred, ADU is dirty, and instructed to clean up,
//attempt to reset ADU and free lock (propogate rc of original fail)
if (fapi2::current_err && adu_is_dirty && !adu_leave_dirty)
{
(void) p9_adu_coherent_utils_reset_adu(i_target);
(void) p9_adu_coherent_manage_lock(i_target, false, false, num_attempts);
}

FAPI_DBG("Exiting...");
return fapi2::current_err;
}

} // extern "C"

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