PRD: Disable OCMB UCS check and clear subchnl specific attn

Change-Id: I92996edae849b1b92b58d1b309df7c555ac5b90f
CQ: SW487664
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/93534
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Zane C Shelley <zshelle@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/93634
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

Author: cnpalmer

src/usr/diag/prdf/common/plat/explorer/explorer_ocmb_regs.rule

@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2019
+# Contributors Listed Below - COPYRIGHT 2019,2020
 # [+] International Business Machines Corp.
 #
 #
@@ -469,13 +469,3 @@
         capture     group default;
     };
 
-    ############################################################################
-    # Interrupt status register
-    ############################################################################
-
-    register INTER_STATUS_REG
-    {
-        name        "TPTOP.PIB.PCBMS.INTERRUPT_TYPE_REG";
-        scomaddr    0x000F001A;
-        capture     group default;
-    };

src/usr/diag/prdf/common/plat/mem/prdfMemUtils.C

@@ -678,13 +678,19 @@ void cleanupChnlAttns<TYPE_OCMB_CHIP>( ExtensibleChip * i_chip,
 
     #ifdef __HOSTBOOT_MODULE // only do cleanup in Hostboot, no-op in FSP
 
-    // Clear the associated FIR bits for all attention types. DSTLFIR[0:7]
+    // Get the subchannel pos (0:1)
+    TargetHandle_t ocmb = i_chip->getTrgt();
+    TargetHandle_t omi = getConnectedParent( ocmb, TYPE_OMI );
+    uint8_t chnlPos = getTargetPosition(omi) % MAX_OMI_PER_MCC;
+
+    // Clear the associated FIR bits for all attention types. DSTLFIR[0:3]
+    // for subchannel 0 or DSTLFIR[4:7] for subchannel 1
     ExtensibleChip * mcc = getConnectedParent( i_chip, TYPE_MCC );
 
     SCAN_COMM_REGISTER_CLASS * reg = mcc->getRegister( "DSTLFIR_AND" );
 
     reg->setAllBits();
-    reg->SetBitFieldJustified( 0, 8, 0 );
+    reg->SetBitFieldJustified( chnlPos*4, 4, 0 );
     reg->Write();
 
     #endif // Hostboot only
@@ -1502,6 +1508,7 @@ bool __queryUcsOcmb( ExtensibleChip * i_ocmb )
 
     bool o_activeAttn = false;
 
+    /* TODO
     // We can't use the GLOBAL_CS_FIR. It will not clear automatically when a
     // channel has failed because the hardware clocks have stopped. Also, since
     // it is a virtual register there really is no way to clear it. Fortunately
@@ -1516,6 +1523,7 @@ bool __queryUcsOcmb( ExtensibleChip * i_ocmb )
     {
         o_activeAttn = fir->IsBitSet(2); // Checkstop bit.
     }
+    */
 
     return o_activeAttn;
 }
@@ -1914,11 +1922,13 @@ void __cleanupChnlFail<TYPE_OMI>( TargetHandle_t i_omi,
         reg->Write();
 
 
+        /* TODO
         // To ensure FSP ATTN doesn't think there is an active attention on this
         // OCMB, manually clear the interrupt status register.
         reg = ocmbChip->getRegister( "INTER_STATUS_REG" );
         reg->clearAllBits(); // Blindly clear everything
         reg->Write();
+        */
 
         //   During runtime, send a dynamic memory deallocation message.
         //   During Memory Diagnostics, tell MDIA to stop pattern tests.