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PERV SBE: Level 1 Procedure - p9_sbe_chiplet_reset
HWP name changed from sbe_nest_chiplet_reset to sbe_chiplet_reset Has new UML framework perv profile release 1.2.14 Change-Id: Ic3fac54ccfa2a78bcb12c42830cc26b777359510 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18541 Reviewed-by: Derk Rembold <rembold@de.ibm.com> Tested-by: Derk Rembold <rembold@de.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36926 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H
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/* IBM_PROLOG_BEGIN_TAG */ | ||
/* This is an automatically generated prolog. */ | ||
/* */ | ||
/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H $ */ | ||
/* */ | ||
/* OpenPOWER HostBoot Project */ | ||
/* */ | ||
/* Contributors Listed Below - COPYRIGHT 2015,2017 */ | ||
/* [+] International Business Machines Corp. */ | ||
/* */ | ||
/* */ | ||
/* Licensed under the Apache License, Version 2.0 (the "License"); */ | ||
/* you may not use this file except in compliance with the License. */ | ||
/* You may obtain a copy of the License at */ | ||
/* */ | ||
/* http://www.apache.org/licenses/LICENSE-2.0 */ | ||
/* */ | ||
/* Unless required by applicable law or agreed to in writing, software */ | ||
/* distributed under the License is distributed on an "AS IS" BASIS, */ | ||
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ | ||
/* implied. See the License for the specific language governing */ | ||
/* permissions and limitations under the License. */ | ||
/* */ | ||
/* IBM_PROLOG_END_TAG */ | ||
//------------------------------------------------------------------------------ | ||
/// @file p9_sbe_chiplet_reset.H | ||
/// | ||
/// @brief Identify all good chiplets excluding EQ/EC | ||
/// Setup multicast groups for all chiplets | ||
/// For all good chiplets excluding EQ/EC | ||
/// For all enabled chiplets | ||
// *! | ||
// *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com | ||
// *! BACKUP NAME : Email: | ||
//------------------------------------------------------------------------------ | ||
// *HWP HWP Owner : Abhishek Agarwal <abagarw8@in.ibm.com> | ||
// *HWP FW Owner : Brian Silver <bsilver@us.ibm.com> | ||
// *HWP Team : Perv | ||
// *HWP Level : 1 | ||
// *HWP Consumed by : SBE | ||
//------------------------------------------------------------------------------ | ||
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#ifndef _P9_SBE_CHIPLET_RESET_H_ | ||
#define _P9_SBE_CHIPLET_RESET_H_ | ||
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#include <fapi2.H> | ||
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typedef fapi2::ReturnCode (*p9_sbe_chiplet_reset_FP_t)(const | ||
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&); | ||
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/// @brief Identify all good chiplets excluding EQ/EC | ||
/// -- All chiplets will be reset and PLLs started | ||
/// -- Partial bad - All nest Chiplets must be good, MC, IO can be partial bad | ||
/// Setup multicast groups for all chiplets | ||
/// -- Can't use the multicast for all non-nest chiplets | ||
/// -- This is intended to be the eventual product setting | ||
/// -- This includes the core/cache chiplets | ||
/// For all good chiplets excluding EQ/EC | ||
/// -- Setup Chiplet GP3 regs | ||
/// -- Reset to default state | ||
/// -- Set chiplet enable on all all good chiplets excluding EQ/EC | ||
/// For all enabled chiplets | ||
/// -- Start vital clocks and release endpoint reset | ||
/// -- PCB Slave error register Reset | ||
/// | ||
/// | ||
/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target | ||
/// @return FAPI2_RC_SUCCESS if success, else error code. | ||
extern "C" | ||
{ | ||
fapi2::ReturnCode p9_sbe_chiplet_reset(const | ||
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip); | ||
} | ||
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#endif |