Level 2 HWP for p9_sbe_chiplet_reset

updates according to version90 IPL spread sheet
(Multicast updates not included)

Change-Id: I58b135cb0a5c86a40c70edbc9d673217a7779391
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23400
Tested-by: Jenkins Server
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com>
Reviewed-by: Parvathi Rachakonda
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36930
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H

@@ -32,7 +32,6 @@
 ///     4) Similar way,  Reset sys.config and OPCG setting for Nest and MC chiplet in sync mode
 ///
 /// Done
-///
 //------------------------------------------------------------------------------
 // *HWP HW Owner        : Abhishek Agarwal <abagarw8@in.ibm.com>
 // *HWP HW Backup Owner : Srinivas V. Naga <srinivan@in.ibm.com>
@@ -68,7 +67,7 @@ enum P9_SBE_CHIPLET_RESET_Public_Constants
     HANG_PULSE_0X13 = 0x13,
     HANG_PULSE_0X03 = 0x03,
     OPCG_ALIGN_SETTING = 0x5000000000003020ull,
-    INOP_ALIGN_SETTING_0X9 = 0x9,
+    INOP_ALIGN_SETTING_0X5 = 0x5,
     OPCG_WAIT_CYCLE_0X020 = 0x020,
     SCAN_RATIO_0X3 = 0x3,
     SYNC_PULSE_DELAY_0X0 = 0X00,