Updated SCU88 register for Correct PCIe inventory

[agangidi53]

Before This change:
a) SCU 88 was double assigned, first to 0x01C000FF in line:97 and then to 0x01C0007F in line:100.
b) Which meant (in both cases, some or all of) bits 7:0 were set to 1. That is: We were reading : PWMx or VPIGx instead of GPIONx (GPIONx gives us the PCIe inventory status, where x is bit number)

After This Change:
a) Got rid of the double assignment by commenting out the second SCU88 assignment
b) Bits (7:0) of SCU 88 are set to 0 . (According to Page 111 of data sheet these have to be set to 0 for us to to read GPION0 to GPIO N7 which indicate if PCIe device is present )

Description of pins 7:0 of SCU 88:
7 RW Enable PWM7 or VPIG7 function pin (SCU90[5:4]=0x2 select Video pin)
6 RW Enable PWM6 or VPIG6 function pin (SCU90[5:4]=0x2 select Video pin)
5 RW Enable PWM5 or VPIG5 function pin (SCU90[5:4]!=0 select Video pin)
4 RW Enable PWM4 or VPIG4 function pin (SCU90[5:4]!=0 select Video pin)
3 RW Enable PWM3 or VPIG3 function pin (SCU90[5:4]!=0 select Video pin)
2 RW Enable PWM2 or VPIG2 function pin (SCU90[5:4]!=0 select Video pin)
1 RW Enable PWM1 or VPIG1 function pin (SCU90[5:4]=0x3 select Video pin)
0 RW Enable PWM0 or VPIG0 function pin (SCU90[5:4]=0x3 select Video pin)

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This change is

[williamspatrick]

Review status: 0 of 1 files reviewed at latest revision, 1 unresolved discussion.

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objects/control_bmc_barreleye.c, line 100 [r1] (raw file):
I don't know the details on registers 88, 8c and 90, but from this existing sequence should we just set to FF at the end? We might need 88 in 00 state in order to properly program 8c and 90.

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Comments from the review on Reviewable.io