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add gpio and TRNG drivers (#31)
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* add GPIO/Seceng drivers for linux and create two different whole-bin images for either sispeed m1s or pine64 ox64 (as we have different dts files for them now)

* Update Readme

* Update Defconfig Files
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Fishwaldo committed Feb 17, 2023
1 parent 0163811 commit a8aa9f8
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9 changes: 6 additions & 3 deletions .github/workflows/buildroot.yml
Original file line number Diff line number Diff line change
Expand Up @@ -73,7 +73,8 @@ jobs:
echo "DTB=${{ github.workspace }}/buildroot/output/images/bl808-*.dtb" >> $GITHUB_ENV
echo "OPENSBI=${{ github.workspace }}/buildroot/output/images/fw_jump.bin" >> $GITHUB_ENV
echo "LOWLOAD=${{ github.workspace }}/buildroot/output/images/*_lowload_bl808_*.bin" >> $GITHUB_ENV
echo "WHOLEBIN=${{ github.workspace }}/buildroot/output/images/whole_img_linux.bin" >> $GITHUB_ENV
echo "WHOLEBINOX=${{ github.workspace }}/buildroot/output/images/pine64-ox64-firmware.bin" >> $GITHUB_ENV
echo "WHOLEBINM1=${{ github.workspace }}/buildroot/output/images/sispeed-m1s-firmware.bin" >> $GITHUB_ENV
echo "BRSDK=${{ github.workspace }}/buildroot/output/images/riscv*.tar.gz" >> $GITHUB_ENV
- name: Upload package
uses: actions/upload-artifact@master
Expand All @@ -85,7 +86,8 @@ jobs:
${{env.DTB}}
${{env.OPENSBI}}
${{env.LOWLOAD}}
${{env.WHOLEBIN}}
${{env.WHOLEBINOX}}
${{env.WHOLEBINM1}}
- name: Upload sdk
if: matrix.target == 'pine64_ox64_full_defconfig'
uses: actions/upload-artifact@master
Expand Down Expand Up @@ -121,7 +123,8 @@ jobs:
mv Image-${{ matrix.target }}.lz4 Image.lz4
mkdir firmware
cp *_lowload_bl808_*.bin firmware/
cp whole_img_linux.bin firmware/
cp pine64-ox64-firmware.bin firmware/
cp sispeed-m1s-firmware.bin firmware/
cp sdcard-${{ matrix.target }}.img.xz firmware/
tar -czvf bl808-linux-${{ matrix.target }}.tar.gz firmware
echo "FIRMWARE=${{ github.workspace }}/build/bl808-linux-${{ matrix.target }}.tar.gz" >> $GITHUB_ENV
Expand Down
22 changes: 20 additions & 2 deletions README.md
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
# Buildroot overlay for Bouffalo chips
# Buildroot overlay for BL808 based boards

## Usage

Expand All @@ -20,6 +20,12 @@ Two images are currently build - A minimal image - `sdcard-pine64_0x64_defconfig

The SD card images are configured with a 1Gb Swap Partition, and will resize the rootfs partition on first boot to the full size of the SD card.

Inside the downloads you will find the following files:
* m0_lowload_bl808_m0.bin - This firmware runs on M0 and forwards interupts to the D0 for several peripherals
* d0_lowload_bl808_d0.bin - This is a very basic bootloader that loads opensbi, the kernel and dts files into ram
* pine64-ox64-firmware.bin/sispeed-m1s-firmware.bin - A image containing OpenSBI, the Kernel and DTS files for Pine64 OX64 and SiSpeed M1S Dock
* sdcard-*.tar.xz - A tarball containing the rootfs for the image to be flashed to the SD card

### Development images
Latest Development Build Result:
[![Build](https://github.com/openbouffalo/buildroot_bouffalo/actions/workflows/buildroot.yml/badge.svg)](https://github.com/openbouffalo/buildroot_bouffalo/actions/workflows/buildroot.yml)
Expand All @@ -45,11 +51,23 @@ Download your prefered image above and extract the files.
- D0 Group[Group1] Image Addr [0x58000000] [PATH to d0_low_load_bl808_d0.bin]
- Click 'Create & Download' and wait until it's done
- Switch to [IOT] page
- Enable 'Single Download', set Address with 0xD2000, choose [PATH to whole_image_linux.bin]
- Enable 'Single Download', set Address with 0xD2000, choose [PATH to pine64-ox64-firmware.bin/sispeed-m1s-firmware.bin] (depending on your board)
- Click 'Create & Download' again and wait until it's done
- flash the sdcard-pine64-*.img.xz to your SD card (you can use dd (after uncompressing) or https://github.com/balena-io/etcher)
- Serial Console access:
+ UART TX is physical pin 32/GPIO 16.
+ UART RX is physical pin 31/GPIO 17.
+ Baud 2000000.
- Enjoy!

## Compiling Applications for BL808 based boards

Buildroot provides a "SDK" for the baords. This is a tarball containing the cross compiler and sysroot for the target board. This can be used to compile applications for the board. Please refer to https://github.com/openbouffalo/buildroot_bouffalo/wiki/Building-Programs-outside-of-buildroot for basic instructions (or consult the [buildroot documentation](https://buildroot.org/downloads/manual/using-buildroot-toolchain.txt))

## Current Status of Linux

Please refer to the projects tab for the status of drivers in development.

## Disucssions

Please use the github discussions for any questions or issues.
25 changes: 25 additions & 0 deletions board/pine64/ox64/linux_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -133,3 +133,28 @@ CONFIG_DEBUG_FS=y
CONFIG_DEBUG_VM_PGTABLE=y
# CONFIG_RUNTIME_TESTING_MENU is not set
CONFIG_MEMTEST=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_BFLB_GPIO=y
CONFIG_GPIO_SYSFS=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_USER=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_MTD=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_ACTIVITY=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_LEDS_TRIGGER_CAMERA=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_TRIGGER_NETDEV=y
CONFIG_LEDS_TRIGGER_PATTERN=y
CONFIG_LEDS_TRIGGER_AUDIO=y
CONFIG_LEDS_TRIGGER_TTY=y
CONFIG_CRYPTO_DEV_BFLB_SECENG=y
18 changes: 14 additions & 4 deletions board/pine64/ox64/mergebin.py
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@
# Description: Merge the Kernel, DTB, and OpenSBI into a single binary
# From @BBBSnowball
import struct
import argparse
from math import inf

kB = 1024
Expand Down Expand Up @@ -102,18 +103,27 @@ def collect_data(self):
def make_regions():
regions = FlashRegions(7*MB)
regions.add('header', None, VM_BOOT_SECTION_HEADER, whole_img_base, max_size=0x100)
regions.add("dtb", "bl808-pine64-ox64.dtb", VM_BOOT_SECTION_DTB, whole_img_base + regions.header.max_size, max_size=0x10000)
regions.add("opensbi", "fw_jump.bin", VM_BOOT_SECTION_OPENSBI, regions.dtb.flash_offset + regions.dtb.max_size, max_size=0x20000)
regions.add("linux", "Image.lz4", VM_BOOT_SECTION_KERNEL, regions.opensbi.flash_offset + regions.opensbi.max_size )
regions.add("dtb", args.dtb, VM_BOOT_SECTION_DTB, whole_img_base + regions.header.max_size, max_size=0x10000)
regions.add("opensbi", args.sbi, VM_BOOT_SECTION_OPENSBI, regions.dtb.flash_offset + regions.dtb.max_size, max_size=0x20000)
regions.add("linux", args.kernel, VM_BOOT_SECTION_KERNEL, regions.opensbi.flash_offset + regions.opensbi.max_size )
return regions


if __name__ == '__main__':
parser = argparse.ArgumentParser(
prog = 'mergebin.py',
description = 'Creates a Single Binary Image of the kernel, opensbi and dts files')
parser.add_argument('-o', '--output', help='Output file name', required=True)
parser.add_argument('-d', '--dtb', help='DTB file name', required=True)
parser.add_argument('-k', '--kernel', help='Kernel file name', required=True)
parser.add_argument('-s', '--sbi', help='OpenSBI file name', required=True)
args = parser.parse_args()

regions = make_regions()
regions.read()

regions.check()

with open("whole_img_linux.bin", "wb+") as f:
with open(args.output, "wb+") as f:
f.write(regions.collect_data())

This file was deleted.

Original file line number Diff line number Diff line change
@@ -0,0 +1,29 @@
From d7022e457c750271fa2acabbfb432ac56f9c924e Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 5 Feb 2023 16:13:42 -0600
Subject: [PATCH 24/31] riscv: dts: bflb: m1s: Fix address/size-cells

The number of address cells needed here (one) does not match the
implicitly-defined default number of cells.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---
arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dts | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dts b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dts
index 031c824f2061..5307508e7a94 100644
--- a/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dts
+++ b/arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dts
@@ -33,6 +33,8 @@ xip_flash@58500000 {
linux,mtd-name = "xip-flash.0";
erase-size = <0x10000>;
bank-width = <4>;
+ #address-cells = <1>;
+ #size-cells = <1>;

rootfs@0 {
label = "rootfs";
--
2.25.1

Original file line number Diff line number Diff line change
@@ -0,0 +1,29 @@
From fc79d0beffc72950292e5adbe5e3481664e689d8 Mon Sep 17 00:00:00 2001
From: Allen Martin <armartin@gmail.com>
Date: Sun, 5 Feb 2023 20:18:50 -0800
Subject: [PATCH 25/31] riscv: dts: bflb: ox64: Fix address/size-cells

The number of address cells needed here (one) does not match the
implicitly-defined default number of cells.

Signed-off-by: Allen Martin <armartin@gmail.com>
---
arch/riscv/boot/dts/bouffalolab/bl808-pine64-ox64.dts | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/riscv/boot/dts/bouffalolab/bl808-pine64-ox64.dts b/arch/riscv/boot/dts/bouffalolab/bl808-pine64-ox64.dts
index f9ed636291f6..f1db126d88e7 100644
--- a/arch/riscv/boot/dts/bouffalolab/bl808-pine64-ox64.dts
+++ b/arch/riscv/boot/dts/bouffalolab/bl808-pine64-ox64.dts
@@ -34,6 +34,8 @@ xip_flash@58500000 {
linux,mtd-name = "xip-flash.0";
erase-size = <0x10000>;
bank-width = <4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
};
};

--
2.25.1

Original file line number Diff line number Diff line change
@@ -0,0 +1,29 @@
From ac995c3b89aa22d75da6d7baf5a3c659a9f47dcc Mon Sep 17 00:00:00 2001
From: Justin Hammond <justin@dynam.ac>
Date: Mon, 6 Feb 2023 13:38:55 +0800
Subject: [PATCH 26/31] Add timer node for OpenSBI 1.2 compatibility

---
arch/riscv/boot/dts/bouffalolab/bl808.dtsi | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/arch/riscv/boot/dts/bouffalolab/bl808.dtsi b/arch/riscv/boot/dts/bouffalolab/bl808.dtsi
index dd795667dea6..34652e17aece 100644
--- a/arch/riscv/boot/dts/bouffalolab/bl808.dtsi
+++ b/arch/riscv/boot/dts/bouffalolab/bl808.dtsi
@@ -140,5 +140,12 @@ plic: interrupt-controller@e0000000 {
#interrupt-cells = <2>;
riscv,ndev = <64>;
};
+
+ clint: timer@e4000000 {
+ compatible = "thead,c900-clint";
+ reg = <0xe4000000 0xc000>;
+ interrupts-extended = <&cpu0_intc 3>,
+ <&cpu0_intc 7>;
+ };
};
};
--
2.25.1

Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
From b6635b506ad2a53cc8d0b786d741f9aa42ccc50b Mon Sep 17 00:00:00 2001
From: Justin Hammond <justin@dynam.ac>
Date: Mon, 6 Feb 2023 13:41:53 +0800
Subject: [PATCH 27/31] Tabstops are 8 chars, not 4

---
arch/riscv/boot/dts/bouffalolab/bl808.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/boot/dts/bouffalolab/bl808.dtsi b/arch/riscv/boot/dts/bouffalolab/bl808.dtsi
index 34652e17aece..7cd033b6a1cf 100644
--- a/arch/riscv/boot/dts/bouffalolab/bl808.dtsi
+++ b/arch/riscv/boot/dts/bouffalolab/bl808.dtsi
@@ -145,7 +145,7 @@ clint: timer@e4000000 {
compatible = "thead,c900-clint";
reg = <0xe4000000 0xc000>;
interrupts-extended = <&cpu0_intc 3>,
- <&cpu0_intc 7>;
+ <&cpu0_intc 7>;
};
};
};
--
2.25.1

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