[TASK] <MCU Manual: High Level Architecture>

[DBees]

Description of Done

Accepted pull request covering
CORE-V MCU block diagram with main sub-systems
The top-level internal system elements and peripherals in the CORE-V MCU
Key blocks in the main sub-systems
Buses in the CORE-V MCU: APB, secondary buses, and bridges
Memory concepts in the CORE-V MCU architecture
SRAM
Private
TCDM
Logarithmic interconnect bus

Associated PRs

No response

[MikeOpenHWGroup]

Hi @davideschiavone. The updated CORE-V-MCU has a new chapter called High Level Architecture. It is "OK" and "mostly complete", but it would benefit from a review from you. Please have a look and send @MikeOpenHWGroup your feedback.