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fix the divL/modL in riscv32.ad #479

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shining1984
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The divL and modL in riscv32.ad need to deal, because the long in rv32g
is 64bit, and it use the two regs.

The divL and modL in riscv32.ad need to deal, because the long in rv32g
is 64bit, and it use the two regs.
@shining1984 shining1984 self-assigned this Aug 19, 2022
@shining1984 shining1984 merged commit aebed8c into openjdk-riscv:rv32g-dev-c2 Aug 19, 2022
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