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@JesperIRL
JesperIRL committed Jun 23, 2021
2 parents 0c693e2 + 35e4c27 commit b6cfca8
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Showing 59 changed files with 811 additions and 1,219 deletions.
71 changes: 49 additions & 22 deletions src/hotspot/cpu/x86/x86.ad
View file
Expand Up @@ -4844,7 +4844,8 @@ instruct vaddB_reg(vec dst, vec src1, vec src2) %{
%}

instruct vaddB_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (AddVB src (LoadVector mem)));
format %{ "vpaddb $dst,$src,$mem\t! add packedB" %}
ins_encode %{
Expand Down Expand Up @@ -4877,7 +4878,8 @@ instruct vaddS_reg(vec dst, vec src1, vec src2) %{
%}

instruct vaddS_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (AddVS src (LoadVector mem)));
format %{ "vpaddw $dst,$src,$mem\t! add packedS" %}
ins_encode %{
Expand Down Expand Up @@ -4911,7 +4913,8 @@ instruct vaddI_reg(vec dst, vec src1, vec src2) %{


instruct vaddI_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (AddVI src (LoadVector mem)));
format %{ "vpaddd $dst,$src,$mem\t! add packedI" %}
ins_encode %{
Expand Down Expand Up @@ -4944,7 +4947,8 @@ instruct vaddL_reg(vec dst, vec src1, vec src2) %{
%}

instruct vaddL_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (AddVL src (LoadVector mem)));
format %{ "vpaddq $dst,$src,$mem\t! add packedL" %}
ins_encode %{
Expand Down Expand Up @@ -4977,7 +4981,8 @@ instruct vaddF_reg(vec dst, vec src1, vec src2) %{
%}

instruct vaddF_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (AddVF src (LoadVector mem)));
format %{ "vaddps $dst,$src,$mem\t! add packedF" %}
ins_encode %{
Expand Down Expand Up @@ -5010,7 +5015,8 @@ instruct vaddD_reg(vec dst, vec src1, vec src2) %{
%}

instruct vaddD_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (AddVD src (LoadVector mem)));
format %{ "vaddpd $dst,$src,$mem\t! add packedD" %}
ins_encode %{
Expand Down Expand Up @@ -5045,7 +5051,8 @@ instruct vsubB_reg(vec dst, vec src1, vec src2) %{
%}

instruct vsubB_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (SubVB src (LoadVector mem)));
format %{ "vpsubb $dst,$src,$mem\t! sub packedB" %}
ins_encode %{
Expand Down Expand Up @@ -5079,7 +5086,8 @@ instruct vsubS_reg(vec dst, vec src1, vec src2) %{
%}

instruct vsubS_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (SubVS src (LoadVector mem)));
format %{ "vpsubw $dst,$src,$mem\t! sub packedS" %}
ins_encode %{
Expand Down Expand Up @@ -5112,7 +5120,8 @@ instruct vsubI_reg(vec dst, vec src1, vec src2) %{
%}

instruct vsubI_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (SubVI src (LoadVector mem)));
format %{ "vpsubd $dst,$src,$mem\t! sub packedI" %}
ins_encode %{
Expand Down Expand Up @@ -5146,7 +5155,8 @@ instruct vsubL_reg(vec dst, vec src1, vec src2) %{


instruct vsubL_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (SubVL src (LoadVector mem)));
format %{ "vpsubq $dst,$src,$mem\t! sub packedL" %}
ins_encode %{
Expand Down Expand Up @@ -5179,7 +5189,8 @@ instruct vsubF_reg(vec dst, vec src1, vec src2) %{
%}

instruct vsubF_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (SubVF src (LoadVector mem)));
format %{ "vsubps $dst,$src,$mem\t! sub packedF" %}
ins_encode %{
Expand Down Expand Up @@ -5212,7 +5223,8 @@ instruct vsubD_reg(vec dst, vec src1, vec src2) %{
%}

instruct vsubD_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (SubVD src (LoadVector mem)));
format %{ "vsubpd $dst,$src,$mem\t! sub packedD" %}
ins_encode %{
Expand Down Expand Up @@ -5360,7 +5372,8 @@ instruct vmulS_reg(vec dst, vec src1, vec src2) %{
%}

instruct vmulS_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (MulVS src (LoadVector mem)));
format %{ "vpmullw $dst,$src,$mem\t! mul packedS" %}
ins_encode %{
Expand Down Expand Up @@ -5394,7 +5407,8 @@ instruct vmulI_reg(vec dst, vec src1, vec src2) %{
%}

instruct vmulI_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (MulVI src (LoadVector mem)));
format %{ "vpmulld $dst,$src,$mem\t! mul packedI" %}
ins_encode %{
Expand All @@ -5418,7 +5432,8 @@ instruct vmulL_reg(vec dst, vec src1, vec src2) %{
%}

instruct vmulL_mem(vec dst, vec src, memory mem) %{
predicate(VM_Version::supports_avx512dq());
predicate(VM_Version::supports_avx512dq() &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (MulVL src (LoadVector mem)));
format %{ "vpmullq $dst,$src,$mem\t! mul packedL" %}
ins_encode %{
Expand Down Expand Up @@ -5503,7 +5518,8 @@ instruct vmulF_reg(vec dst, vec src1, vec src2) %{
%}

instruct vmulF_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (MulVF src (LoadVector mem)));
format %{ "vmulps $dst,$src,$mem\t! mul packedF" %}
ins_encode %{
Expand Down Expand Up @@ -5536,7 +5552,8 @@ instruct vmulD_reg(vec dst, vec src1, vec src2) %{
%}

instruct vmulD_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (MulVD src (LoadVector mem)));
format %{ "vmulpd $dst,$src,$mem\t! mul packedD" %}
ins_encode %{
Expand Down Expand Up @@ -5607,7 +5624,8 @@ instruct vdivF_reg(vec dst, vec src1, vec src2) %{
%}

instruct vdivF_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (DivVF src (LoadVector mem)));
format %{ "vdivps $dst,$src,$mem\t! div packedF" %}
ins_encode %{
Expand Down Expand Up @@ -5640,7 +5658,8 @@ instruct vdivD_reg(vec dst, vec src1, vec src2) %{
%}

instruct vdivD_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (DivVD src (LoadVector mem)));
format %{ "vdivpd $dst,$src,$mem\t! div packedD" %}
ins_encode %{
Expand Down Expand Up @@ -5824,6 +5843,7 @@ instruct vsqrtF_reg(vec dst, vec src) %{
%}

instruct vsqrtF_mem(vec dst, memory mem) %{
predicate(vector_length_in_bytes(n->in(1)) > 8);
match(Set dst (SqrtVF (LoadVector mem)));
format %{ "vsqrtps $dst,$mem\t! sqrt packedF" %}
ins_encode %{
Expand All @@ -5847,6 +5867,7 @@ instruct vsqrtD_reg(vec dst, vec src) %{
%}

instruct vsqrtD_mem(vec dst, memory mem) %{
predicate(vector_length_in_bytes(n->in(1)) > 8);
match(Set dst (SqrtVD (LoadVector mem)));
format %{ "vsqrtpd $dst,$mem\t! sqrt packedD" %}
ins_encode %{
Expand Down Expand Up @@ -6459,7 +6480,8 @@ instruct vand_reg(vec dst, vec src1, vec src2) %{
%}

instruct vand_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (AndV src (LoadVector mem)));
format %{ "vpand $dst,$src,$mem\t! and vectors" %}
ins_encode %{
Expand Down Expand Up @@ -6493,7 +6515,8 @@ instruct vor_reg(vec dst, vec src1, vec src2) %{
%}

instruct vor_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (OrV src (LoadVector mem)));
format %{ "vpor $dst,$src,$mem\t! or vectors" %}
ins_encode %{
Expand Down Expand Up @@ -6527,7 +6550,8 @@ instruct vxor_reg(vec dst, vec src1, vec src2) %{
%}

instruct vxor_mem(vec dst, vec src, memory mem) %{
predicate(UseAVX > 0);
predicate((UseAVX > 0) &&
(vector_length_in_bytes(n->in(1)) > 8));
match(Set dst (XorV src (LoadVector mem)));
format %{ "vpxor $dst,$src,$mem\t! xor vectors" %}
ins_encode %{
Expand Down Expand Up @@ -7947,6 +7971,7 @@ instruct vfmaF_reg(vec a, vec b, vec c) %{
%}

instruct vfmaF_mem(vec a, memory b, vec c) %{
predicate(vector_length_in_bytes(n->in(1)) > 8);
match(Set c (FmaVF c (Binary a (LoadVector b))));
format %{ "fmaps $a,$b,$c\t# $c = $a * $b + $c fma packedF" %}
ins_cost(150);
Expand All @@ -7971,6 +7996,7 @@ instruct vfmaD_reg(vec a, vec b, vec c) %{
%}

instruct vfmaD_mem(vec a, memory b, vec c) %{
predicate(vector_length_in_bytes(n->in(1)) > 8);
match(Set c (FmaVD c (Binary a (LoadVector b))));
format %{ "fmapd $a,$b,$c\t# $c = $a * $b + $c fma packedD" %}
ins_cost(150);
Expand Down Expand Up @@ -8048,6 +8074,7 @@ instruct vpternlog(vec dst, vec src2, vec src3, immU8 func) %{
%}

instruct vpternlog_mem(vec dst, vec src2, memory src3, immU8 func) %{
predicate(vector_length_in_bytes(n->in(1)) > 8);
match(Set dst (MacroLogicV (Binary dst src2) (Binary (LoadVector src3) func)));
effect(TEMP dst);
format %{ "vpternlogd $dst,$src2,$src3,$func\t! vector ternary logic" %}
Expand Down
14 changes: 12 additions & 2 deletions src/hotspot/share/code/nmethod.cpp
View file
Expand Up @@ -1596,8 +1596,18 @@ void nmethod::post_compiled_method_load_event(JvmtiThreadState* state) {

// Don't post this nmethod load event if it is already dying
// because the sweeper might already be deleting this nmethod.
if (is_not_entrant() && can_convert_to_zombie()) {
return;
{
MutexLocker ml(CompiledMethod_lock, Mutex::_no_safepoint_check_flag);
// When the nmethod is acquired from the CodeCache iterator, it can racingly become zombie
// before this code is called. Filter them out here under the CompiledMethod_lock.
if (!is_alive()) {
return;
}
// As for is_alive() nmethods, we also don't want them to racingly become zombie once we
// release this lock, so we check that this is not going to be the case.
if (is_not_entrant() && can_convert_to_zombie()) {
return;
}
}

// This is a bad time for a safepoint. We don't want
Expand Down
10 changes: 10 additions & 0 deletions src/hotspot/share/opto/loopTransform.cpp
View file
Expand Up @@ -2851,6 +2851,16 @@ int PhaseIdealLoop::do_range_check(IdealLoopTree *loop, Node_List &old_new) {
register_new_node(main_cmp, main_cle->in(0));
_igvn.replace_input_of(main_bol, 1, main_cmp);
}
assert(main_limit == cl->limit() || get_ctrl(main_limit) == pre_ctrl, "wrong control for added limit");
const TypeInt* orig_limit_t = _igvn.type(orig_limit)->is_int();
bool upward = cl->stride_con() > 0;
// The new loop limit is <= (for an upward loop) >= (for a downward loop) than the orig limit.
// The expression that computes the new limit may be too complicated and the computed type of the new limit
// may be too pessimistic. A CastII here guarantees it's not lost.
main_limit = new CastIINode(main_limit, TypeInt::make(upward ? min_jint : orig_limit_t->_lo,
upward ? orig_limit_t->_hi : max_jint, Type::WidenMax));
main_limit->init_req(0, pre_ctrl);
register_new_node(main_limit, pre_ctrl);
// Hack the now-private loop bounds
_igvn.replace_input_of(main_cmp, 2, main_limit);
// The OpaqueNode is unshared by design
Expand Down
6 changes: 4 additions & 2 deletions src/hotspot/share/prims/jvmtiCodeBlobEvents.cpp
View file
Expand Up @@ -227,8 +227,10 @@ jvmtiError JvmtiCodeBlobEvents::generate_compiled_method_load_events(JvmtiEnv* e
{
NoSafepointVerifier nsv; // safepoints are not safe while collecting methods to post.
{
// Walk the CodeCache notifying for live nmethods, don't release the CodeCache_lock
// because the sweeper may be running concurrently.
// Walk the CodeCache notifying for live nmethods. We hold the CodeCache_lock
// to ensure the iteration is safe and nmethods are not concurrently freed.
// However, they may still change states and become !is_alive(). Filtering
// those out is done inside of nmethod::post_compiled_method_load_event().
// Save events to the queue for posting outside the CodeCache_lock.
MutexLocker mu(java_thread, CodeCache_lock, Mutex::_no_safepoint_check_flag);
// Iterate over non-profiled and profiled nmethods
Expand Down
46 changes: 37 additions & 9 deletions src/java.base/share/classes/java/lang/System.java
View file
Expand Up @@ -44,14 +44,16 @@
import java.lang.reflect.Method;
import java.lang.reflect.Modifier;
import java.net.URI;
import java.net.URL;
import java.nio.charset.CharacterCodingException;
import java.security.AccessControlContext;
import java.security.ProtectionDomain;
import java.security.AccessController;
import java.security.PrivilegedAction;
import java.nio.channels.Channel;
import java.nio.channels.spi.SelectorProvider;
import java.nio.charset.Charset;
import java.security.AccessControlContext;
import java.security.AccessController;
import java.security.CodeSource;
import java.security.PrivilegedAction;
import java.security.ProtectionDomain;
import java.util.List;
import java.util.Map;
import java.util.Objects;
Expand Down Expand Up @@ -324,6 +326,16 @@ private static void checkIO() {
private static native void setOut0(PrintStream out);
private static native void setErr0(PrintStream err);

// Remember initial System.err. setSecurityManager() warning goes here
private static volatile @Stable PrintStream initialErrStream;

private static URL codeSource(Class<?> clazz) {
PrivilegedAction<ProtectionDomain> pa = clazz::getProtectionDomain;
@SuppressWarnings("removal")
CodeSource cs = AccessController.doPrivileged(pa).getCodeSource();
return (cs != null) ? cs.getLocation() : null;
}

/**
* Sets the system-wide security manager.
*
Expand Down Expand Up @@ -362,16 +374,29 @@ private static void checkIO() {
* method.
*/
@Deprecated(since="17", forRemoval=true)
@CallerSensitive
public static void setSecurityManager(@SuppressWarnings("removal") SecurityManager sm) {
if (allowSecurityManager()) {
System.err.println("WARNING: java.lang.System::setSecurityManager" +
" is deprecated and will be removed in a future release.");
var callerClass = Reflection.getCallerClass();
URL url = codeSource(callerClass);
final String source;
if (url == null) {
source = callerClass.getName();
} else {
source = callerClass.getName() + " (" + url + ")";
}
initialErrStream.printf("""
WARNING: A terminally deprecated method in java.lang.System has been called
WARNING: System::setSecurityManager has been called by %s
WARNING: Please consider reporting this to the maintainers of %s
WARNING: System::setSecurityManager will be removed in a future release
""", source, callerClass.getName());
implSetSecurityManager(sm);
} else {
// security manager not allowed
if (sm != null) {
throw new UnsupportedOperationException(
"Runtime configured to disallow security manager");
"The Security Manager is deprecated and will be removed in a future release");
}
}
}
Expand Down Expand Up @@ -2191,10 +2216,13 @@ private static void initPhase3() {
}

if (needWarning) {
System.err.println("WARNING: The Security Manager is deprecated" +
" and will be removed in a future release.");
System.err.println("""
WARNING: A command line option has enabled the Security Manager
WARNING: The Security Manager is deprecated and will be removed in a future release""");
}

initialErrStream = System.err;

// initializing the system class loader
VM.initLevel(3);

Expand Down

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