8279565: riscv: RVB: Add byte reverse instruction

[feilongjiang]

This PR has the following changes:

1. Implement byte-reverse instruction rev8 of RISC-V BitManipulation Extension.
2. Code improvement of existing byte reverse methods.
3. Merge assembler_riscv_b.hpp and assembler_riscv_v.hpp into assembler_riscv.hpp

Renaming of byte reverse methods is based on BitManipulation v0.93 [1], which provides rev8.h, rev8.w and rev8 to reverse bytes in halfwords, words, and doubleword respectively. However, there are still some byte reverse operations that are not covered by spec, for example, "reverse bytes in halfword in lower 16 bits and sign extend". Base on the existing instructions naming style, we use rev8.h.h to represent it.

New C2 instructions under riscv_b.ad are covered by the following JTREG tests:

• test/hotspot/jtreg/compiler/codegen/Test6431242.java
• test/hotspot/jtreg/compiler/c2/TestCharShortByteSwap.java

Hotspot and jdk tier1 tests on QEMU (with and without UseRVB) are passed without new failures.

---

Progress

• Change must not contain extraneous whitespace
• Commit message must refer to an issue
• Change must be properly reviewed

Issue

• JDK-8279565: riscv: RVB: Add byte reverse instruction

Reviewers

• Fei Yang (@RealFYang - Reviewer)

Reviewing

Using git

Checkout this PR locally:
$ git fetch https://git.openjdk.java.net/riscv-port pull/42/head:pull/42
$ git checkout pull/42

Update a local copy of the PR:
$ git checkout pull/42
$ git pull https://git.openjdk.java.net/riscv-port pull/42/head

Using Skara CLI tools

Checkout this PR locally:
$ git pr checkout 42

View PR using the GUI difftool:
$ git pr show -t 42

Using diff file

Download this PR as a diff file:
https://git.openjdk.java.net/riscv-port/pull/42.diff

[bridgekeeper]

👋 Welcome back fjiang! A progress list of the required criteria for merging this PR into riscv-port will be added to the body of your pull request. There are additional pull request commands available for use with this pull request.

[mlbridge]

Webrevs

• 02: Full (6bc89aec)
• 01: Full - Incremental (46022206)
• 00: Full (79753194)

[feilongjiang]

Rebased riscv-port branch with no conflicts, hotspot tier1 passed on QEMU with UseRVB without new failures.

[RealFYang]

Looks good. Thanks.

[openjdk]

@feilongjiang This change now passes all automated pre-integration checks.

ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details.

After integration, the commit message for the final commit will be:

8279565: riscv: RVB: Add byte reverse instruction

Reviewed-by: fyang

You can use pull request commands such as /summary, /contributor and /issue to adjust it as needed.

At the time when this comment was updated there had been no new commits pushed to the riscv-port branch. If another commit should be pushed before you perform the /integrate command, your PR will be automatically rebased. If you prefer to avoid any potential automatic rebasing, please check the documentation for the /integrate command for further details.

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[feilongjiang]

Thanks for your reviews, Felix.
/integrate

[RealFYang]

/sponsor

[openjdk]

@feilongjiang
Your change (at version 6bc89ae) is now ready to be sponsored by a Committer.

[openjdk]

Going to push as commit c7944ed.

[openjdk]

@RealFYang @feilongjiang Pushed as commit c7944ed.

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